From patchwork Tue Dec 20 07:44:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Akhil P Oommen X-Patchwork-Id: 635707 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 728FBC4167B for ; Tue, 20 Dec 2022 07:45:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233684AbiLTHpV (ORCPT ); Tue, 20 Dec 2022 02:45:21 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57892 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233676AbiLTHpO (ORCPT ); Tue, 20 Dec 2022 02:45:14 -0500 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B7BB81182B; Mon, 19 Dec 2022 23:45:11 -0800 (PST) Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 2BK6pRC6004460; Tue, 20 Dec 2022 07:44:39 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=qcppdkim1; bh=GU/43o5aYgQU494/wwpx1NXvBoK3twBIVcRyWPGgpG8=; b=MwyqbcjbughfVljkZOKSxIVdVZVm1BluZTXBlXawCiEiWKYMmTdA9PBmktLdd5hMLVmp kgF71rzukz76deCfpatr4DCTeSUUyvgyu0zEVRylQUb9s20Sz8IY0SPhLBl7rFwm71Eo yI7gA/ZwlsWt+8utJVgs/0nfUtMk1gOW5hgZVXSHNn8lrm1AYTxPpu46ZVH4KSVvqPgv 0oOc7swSUIXbROarDsVsEZctY/1tTY5dVHQuEOgXqNRlJ3UYBqZj3wEabrR4qaeYMXgn ep+KDu5yhKJyJGqkhx4geLeFQojwzSXtOHCqQTmoOniNIeiKUEwxWwc5/pmoxx+Oeo2Q Aw== Received: from nalasppmta04.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3mk83xr4k2-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Dec 2022 07:44:39 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA04.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2BK7ibkA017977 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 20 Dec 2022 07:44:37 GMT Received: from hyd-lnxbld559.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.36; Mon, 19 Dec 2022 23:44:29 -0800 From: Akhil P Oommen To: freedreno , , , Rob Clark , Ulf Hansson , Bjorn Andersson , Stephen Boyd , Philipp Zabel CC: Akhil P Oommen , Abhinav Kumar , Andy Gross , Chia-I Wu , Daniel Vetter , David Airlie , Dmitry Baryshkov , "Douglas Anderson" , Geert Uytterhoeven , Greg Kroah-Hartman , Guenter Roeck , Kevin Hilman , Konrad Dybcio , Konrad Dybcio , "Len Brown" , Michael Turquette , Pavel Machek , "Rafael J. Wysocki" , "Sean Paul" , , , Subject: [PATCH v3 0/5] Improve GPU reset sequence for Adreno GPU Date: Tue, 20 Dec 2022 13:14:12 +0530 Message-ID: <1671522257-38778-1-git-send-email-quic_akhilpo@quicinc.com> X-Mailer: git-send-email 2.7.4 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: MZw744GSw6qEKIu2d7SsqSrh8Y93nJJs X-Proofpoint-GUID: MZw744GSw6qEKIu2d7SsqSrh8Y93nJJs X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.923,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-12-20_01,2022-12-15_02,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=999 clxscore=1015 bulkscore=0 phishscore=0 impostorscore=0 lowpriorityscore=0 adultscore=0 priorityscore=1501 spamscore=0 suspectscore=0 malwarescore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2212070000 definitions=main-2212200063 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This is a rework of [1] using genpd instead of 'reset' framework. As per the recommended reset sequence of Adreno gpu, we should ensure that gpucc-cx-gdsc has collapsed at hardware to reset gpu's internal hardware states. Because this gdsc is implemented as 'votable', gdsc driver doesn't poll and wait until its hw status says OFF. So use the newly introduced genpd api (dev_pm_genpd_synced_poweroff()) to provide a hint to the gdsc driver to poll for the hw status and use genpd notifier to wait from adreno gpu driver until gdsc is turned OFF. This series is rebased on top of linux-next (20221215) since the changes span multiple drivers. [1] https://patchwork.freedesktop.org/series/107507/ Changes in v3: - Rename the var 'force_sync' to 'wait (Stephen) Changes in v2: - Minor formatting fix - Select PM_GENERIC_DOMAINS from Kconfig Akhil P Oommen (4): clk: qcom: gdsc: Support 'synced_poweroff' genpd flag drm/msm/a6xx: Vote for cx gdsc from gpu driver drm/msm/a6xx: Remove cx gdsc polling using 'reset' drm/msm/a6xx: Use genpd notifier to ensure cx-gdsc collapse Ulf Hansson (1): PM: domains: Allow a genpd consumer to require a synced power off drivers/base/power/domain.c | 23 ++++++++++++++++++ drivers/clk/qcom/gdsc.c | 11 +++++---- drivers/gpu/drm/msm/Kconfig | 1 + drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 46 ++++++++++++++++++++++++++++++++--- drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 7 ++++++ drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 13 +++++++--- drivers/gpu/drm/msm/msm_gpu.c | 4 --- drivers/gpu/drm/msm/msm_gpu.h | 4 --- include/linux/pm_domain.h | 5 ++++ 9 files changed, 94 insertions(+), 20 deletions(-)