From patchwork Fri Mar 17 06:53:54 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 664793 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4F4C8C761A6 for ; Fri, 17 Mar 2023 06:54:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230203AbjCQGyT (ORCPT ); Fri, 17 Mar 2023 02:54:19 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45130 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229539AbjCQGyQ (ORCPT ); Fri, 17 Mar 2023 02:54:16 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6AAD28D27; Thu, 16 Mar 2023 23:54:15 -0700 (PDT) Received: from pps.filterd (m0279864.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 32H6KKqb032734; Fri, 17 Mar 2023 06:54:08 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id; s=qcppdkim1; bh=Af7cGDXm3Kl9r1G14m0zQEHtQziTDYHTcgtuNhqTn8A=; b=AgRWPD9wzGdOMpxjL6EFfMYetSoQwzX892p7lxFpjBlmm5SBUKK3RfCEzUNo+QL7KPcr psYdVP7ay9iq5CePRFKpM8jF0E0F5gIjVgHO8r+G7nUlucVaWQ4GPViexVR9pe6vIPN2 zUg4T3q96DHcZgAoQdwrD6t013O5uQLbyTC3jpqz6cB/HytmlVCwH1yG8v/qwkaeymPv nKpZUBomWcusb6gnimwW+RAyM8dUn7qRDvuSr/lL/ezwrMpYerb4CLbmJL7VIJCbkMzd w5lemdjax1Wawb0aC/HfKLKZo6fYHEg6QlQLo45Ruin5Ew/0n0t+jLtyw8nJhJPN09O+ rQ== Received: from apblrppmta01.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3pc5r1a1ku-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Fri, 17 Mar 2023 06:54:07 +0000 Received: from pps.filterd (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 32H6s36b016064; Fri, 17 Mar 2023 06:54:03 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 3p8jqmd9da-1; Fri, 17 Mar 2023 06:54:03 +0000 Received: from APBLRPPMTA01.qualcomm.com (APBLRPPMTA01.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 32H6s3us016038; Fri, 17 Mar 2023 06:54:03 GMT Received: from hu-sgudaval-hyd.qualcomm.com (hu-rohiagar-hyd.qualcomm.com [10.213.106.138]) by APBLRPPMTA01.qualcomm.com (PPS) with ESMTP id 32H6s2Gj016023; Fri, 17 Mar 2023 06:54:03 +0000 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id CEDD34E19; Fri, 17 Mar 2023 12:24:00 +0530 (+0530) From: Rohit Agarwal To: agross@kernel.org, andersson@kernel.org, konrad.dybcio@linaro.org, lee@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, mani@kernel.org, lpieralisi@kernel.org, kw@linux.com, bhelgaas@google.com, manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, Rohit Agarwal Subject: [PATCH v4 0/5] Add PCIe EP support for SDX65 Date: Fri, 17 Mar 2023 12:23:54 +0530 Message-Id: <1679036039-27157-1-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: v93-wZhBR-cQZH6HWCWcRk1zwiJlIMzk X-Proofpoint-ORIG-GUID: v93-wZhBR-cQZH6HWCWcRk1zwiJlIMzk X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.942,Hydra:6.0.573,FMLib:17.11.170.22 definitions=2023-03-17_03,2023-03-16_02,2023-02-09_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 bulkscore=0 adultscore=0 phishscore=0 suspectscore=0 mlxscore=0 clxscore=1015 mlxlogscore=705 lowpriorityscore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2303150002 definitions=main-2303170045 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Hi, Changes in v4: - Addressed comment from Dmitry to move the gpios to the board file. Changes in v3: - Removing the applied patch. - Addressing some of the compile time issues missed in v2. Changes in v2: - Addressing comments from Konrad and Dmitry. - Rebased on top of 6.3-rc1. This series adds the devicetree support for PCIe PHY and PCIe EP on SDX65. The PCIe EP is enabled on SDX65 MTP board. Thanks, Rohit. Rohit Agarwal (5): dt-bindings: PCI: qcom: Add SDX65 SoC ARM: dts: qcom: sdx65: Add support for PCIe PHY ARM: dts: qcom: sdx65: Add support for PCIe EP ARM: dts: qcom: sdx65-mtp: Enable PCIe PHY ARM: dts: qcom: sdx65-mtp: Enable PCIe EP .../devicetree/bindings/pci/qcom,pcie-ep.yaml | 2 + arch/arm/boot/dts/qcom-sdx65-mtp.dts | 50 ++++++++++++- arch/arm/boot/dts/qcom-sdx65.dtsi | 87 ++++++++++++++++++++++ 3 files changed, 136 insertions(+), 3 deletions(-) Reviewed-by: Manivannan Sadhasivam Reviewed-by: Konrad Dybcio Reviewed-by: Konrad Dybcio