From patchwork Mon Sep 11 09:54:27 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Qiang Yu X-Patchwork-Id: 721542 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A7905CA0EC4 for ; Mon, 11 Sep 2023 21:18:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S245728AbjIKVLc (ORCPT ); Mon, 11 Sep 2023 17:11:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54446 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236182AbjIKJyu (ORCPT ); Mon, 11 Sep 2023 05:54:50 -0400 Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0E61BE5D; Mon, 11 Sep 2023 02:54:46 -0700 (PDT) Received: from pps.filterd (m0279863.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38B6e6Xb003529; Mon, 11 Sep 2023 09:54:35 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id; s=qcppdkim1; bh=dcisKaOxl88pO4ru3b/qyY3BiC0kLFNKOlg2+iCDKjM=; b=GdO4eyyN3MiCEJCgSg3e8hkmifw/r1PYXzW2dUQFjIW37+ZR2WDk30cxBRw+QNfIXKMz IHme0wWvmGK57mgwU/Tmom6ETfv3mYBxKmlrQBcmQflVVZQtl8puxwbBy/cqicezAA+e DQt1jXMnc8KKYy8d3t9c0Pxs2Sdqsa3jJaZZFJJz87IVHUYF217ORQqam++cVmmRFUj3 dHA8pYOBHimvM9O1fbvVtDFSKaJb1nxsjwmu878UaNrLacuiIxsWz1R0qk3MZASFrXSe MYYMXPMb6Rm0fRiNZNPCiIW3Oy4S+YIGR0bTiOlU8RC/MFEKOA7quWav+Z5NqVaqWrag +Q== Received: from aptaippmta02.qualcomm.com (tpe-colo-wan-fw-bordernet.qualcomm.com [103.229.16.4]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3t0gx9uewe-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 11 Sep 2023 09:54:35 +0000 Received: from pps.filterd (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTP id 38B9sX57018265; Mon, 11 Sep 2023 09:54:33 GMT Received: from pps.reinject (localhost [127.0.0.1]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTP id 3t0hsk9dnx-1; Mon, 11 Sep 2023 09:54:33 +0000 Received: from APTAIPPMTA02.qualcomm.com (APTAIPPMTA02.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 38B9sWJM018260; Mon, 11 Sep 2023 09:54:33 GMT Received: from cbsp-sh-gv.qualcomm.com (CBSP-SH-gv.ap.qualcomm.com [10.231.249.68]) by APTAIPPMTA02.qualcomm.com (PPS) with ESMTP id 38B9sWh8018259; Mon, 11 Sep 2023 09:54:32 +0000 Received: by cbsp-sh-gv.qualcomm.com (Postfix, from userid 4098150) id B277A482F; Mon, 11 Sep 2023 17:54:31 +0800 (CST) From: Qiang Yu To: mani@kernel.org, quic_jhugo@quicinc.com Cc: mhi@lists.linux.dev, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, quic_cang@quicinc.com, quic_mrana@quicinc.com, Qiang Yu Subject: [PATCH 0/2] Add lock to avoid race when ringing channel DB Date: Mon, 11 Sep 2023 17:54:27 +0800 Message-Id: <1694426069-74140-1-git-send-email-quic_qianyu@quicinc.com> X-Mailer: git-send-email 2.7.4 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: BwgJDuJ1J3hqsDeTDlS_kzcF0gZx1syZ X-Proofpoint-GUID: BwgJDuJ1J3hqsDeTDlS_kzcF0gZx1syZ X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.267,Aquarius:18.0.957,Hydra:6.0.601,FMLib:17.11.176.26 definitions=2023-09-11_06,2023-09-05_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 spamscore=0 mlxscore=0 lowpriorityscore=0 bulkscore=0 mlxlogscore=551 malwarescore=0 suspectscore=0 adultscore=0 priorityscore=1501 impostorscore=0 clxscore=1011 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2308100000 definitions=main-2309110091 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org 1. We need a write lock in mhi_gen_tre otherwise there is race of the WP used for ringing channel DB between mhi_queue and M0 transition. 2. We can not invoke local_bh_enable() when irqs are disabled, so move read_lock_irqsave() under the mhi_gen_tre() since we add write_lock_bh() in mhi_gen_tre(). Bhaumik Bhatt (1): bus: mhi: host: Add spinlock to protect WP access when queueing TREs Hemant Kumar (1): bus: mhi: host: Take irqsave lock after TRE is generated drivers/bus/mhi/host/main.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-)