mbox series

[0/7] Add and enable GPI DMA users

Message ID 20210111151651.1616813-1-vkoul@kernel.org
Headers show
Series Add and enable GPI DMA users | expand

Message

Vinod Koul Jan. 11, 2021, 3:16 p.m. UTC
Hello,

This series add the GPI DMA in qcom geni spi and i2c drivers. For this we
first need to move GENI_IF_DISABLE_RO and struct geni_wrapper to common
headers and then add support for gpi dma in geni driver.

Then we add spi and i2c geni driver changes to support this DMA.

Lastly, add the GPI dma nodes and enable dma for spi found in Rb3 board.

To merge this, we could merge all thru qcom tree with ack on spi/i2c.

Vinod Koul (7):
  soc: qcom: geni: move GENI_IF_DISABLE_RO to common header
  soc: qcom: geni: move struct geni_wrapper to header
  soc: qcom: geni: Add support for gpi dma
  spi: spi-geni-qcom: Add support for GPI dma
  i2c: qcom-geni: Add support for GPI DMA
  arm64: dts: qcom: sdm845: Add gpi dma node
  arm64: dts: qcom: sdm845: enable dma for spi

 arch/arm64/boot/dts/qcom/sdm845-db845c.dts |   4 +
 arch/arm64/boot/dts/qcom/sdm845.dtsi       |  57 +++
 drivers/i2c/busses/i2c-qcom-geni.c         | 246 ++++++++++++-
 drivers/soc/qcom/qcom-geni-se.c            |  55 ++-
 drivers/spi/spi-geni-qcom.c                | 395 ++++++++++++++++++++-
 include/linux/qcom-geni-se.h               |  20 ++
 6 files changed, 747 insertions(+), 30 deletions(-)

Thanks

Comments

Doug Anderson Jan. 13, 2021, 12:01 a.m. UTC | #1
Hi,

On Mon, Jan 11, 2021 at 7:17 AM Vinod Koul <vkoul@kernel.org> wrote:
>
> Hello,
>
> This series add the GPI DMA in qcom geni spi and i2c drivers. For this we
> first need to move GENI_IF_DISABLE_RO and struct geni_wrapper to common
> headers and then add support for gpi dma in geni driver.
>
> Then we add spi and i2c geni driver changes to support this DMA.
>
> Lastly, add the GPI dma nodes and enable dma for spi found in Rb3 board.
>
> To merge this, we could merge all thru qcom tree with ack on spi/i2c.

It'd be super great if somewhere (ideally in the commit message and
maybe somewhere in the code) you could talk more about the different
modes.  Maybe something like this (if it's correct):

GPI Mode (confusingly, also known as "GSI" mode in some places): In
this mode something else running on the SoC is sharing access to the
geni instance.  This mode allows sharing the device between the Linux
kernel and other users including handling the fact that other users
might be running the geni port at a different clock rate.  GPI mode
limits what you can do with a port.  For instance, direct control of
chip select is not allowed.  NOTE: if firmware has configured a geni
instance for GPI then FIFO and SE_DMA usage is not allowed.
Conversely, if firmware has not configured a geni instance for GPI
then only FIFO and SE_DMA usage is allowed.

SE DMA Mode: Data transfers happen over DMA.

SE FIFO Mode: Data is manually transferred into the FIFO by the CPU.
Vinod Koul Jan. 13, 2021, 3:03 a.m. UTC | #2
Hello Doug,

On 12-01-21, 16:01, Doug Anderson wrote:
> Hi,
> 
> On Mon, Jan 11, 2021 at 7:17 AM Vinod Koul <vkoul@kernel.org> wrote:
> >
> > Hello,
> >
> > This series add the GPI DMA in qcom geni spi and i2c drivers. For this we
> > first need to move GENI_IF_DISABLE_RO and struct geni_wrapper to common
> > headers and then add support for gpi dma in geni driver.
> >
> > Then we add spi and i2c geni driver changes to support this DMA.
> >
> > Lastly, add the GPI dma nodes and enable dma for spi found in Rb3 board.
> >
> > To merge this, we could merge all thru qcom tree with ack on spi/i2c.
> 
> It'd be super great if somewhere (ideally in the commit message and
> maybe somewhere in the code) you could talk more about the different
> modes.  Maybe something like this (if it's correct):
> 
> GPI Mode (confusingly, also known as "GSI" mode in some places): In
> this mode something else running on the SoC is sharing access to the
> geni instance.  This mode allows sharing the device between the Linux
> kernel and other users including handling the fact that other users
> might be running the geni port at a different clock rate.  GPI mode
> limits what you can do with a port.  For instance, direct control of
> chip select is not allowed.  NOTE: if firmware has configured a geni
> instance for GPI then FIFO and SE_DMA usage is not allowed.
> Conversely, if firmware has not configured a geni instance for GPI
> then only FIFO and SE_DMA usage is allowed.
> 
> SE DMA Mode: Data transfers happen over DMA.
> 
> SE FIFO Mode: Data is manually transferred into the FIFO by the CPU.

I think it is a good feedback, there is indeed bunch of confusion wrt
QUP DMA and i think we should add above to qcom geni driver and not just
in cover letter. FWIW for all practical purposes GSI and GPI can be used
interchangeably. There are some nuisances involved like firmware and a
microcontroller but for the sake of simplicity we can skip that :)

Thanks