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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:02 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 0/4] Fixup clocks for venus on sm8250 Date: Thu, 4 Feb 2021 15:01:16 +0000 Message-Id: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org V2: - Adds tested-by/reviewed-by as indicated - Dmitry - Fixes commit log copy/paste typo in patch #3 - Dmitry V1: - Adds some missing indices to the videocc index - Adds videocc clock tree hirearchy for msv0 - Adds a regulator to power the videocc consistent with downstream Once done we can move on to enabling these clocks in the DTS and switch on the venus. Bryan O'Donoghue (4): dt-bindings: clock: Add missing SM8250 videoc clock indices clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_DIV_CLK_SRC clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLK clk: qcom: videocc: Add gdsc mmcx-reg supply hook drivers/clk/qcom/videocc-sm8250.c | 39 +++++++++++++++++++ .../dt-bindings/clock/qcom,videocc-sm8250.h | 2 + 2 files changed, 41 insertions(+) -- 2.29.2