From patchwork Thu Apr 21 10:20:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 565010 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C459DC433FE for ; Thu, 21 Apr 2022 10:23:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1388351AbiDUK0g (ORCPT ); Thu, 21 Apr 2022 06:26:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51028 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1388319AbiDUK00 (ORCPT ); Thu, 21 Apr 2022 06:26:26 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [145.40.68.75]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0ED3015710; Thu, 21 Apr 2022 03:23:37 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 9B4FBB823EF; Thu, 21 Apr 2022 10:23:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B6AE8C385AD; Thu, 21 Apr 2022 10:23:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1650536613; bh=OPcQi8PNLxtf9QqmHXSHr2vOBK8ZZT68KQP3kx1rv+E=; h=From:To:Cc:Subject:Date:From; b=qbA6edcrA92ddaDuiDgGIQ8er1FIBNdhw16dpGwwZRTMNAZmAWJ4MjfSCPscdF4BU 5qI71065k50tiLpfjRfpHEr1H926epJOCV9jebBB7ROGCIIUbLkFnAbmSVFzH4rbl4 maIrJTsdNvzsYVTzKl+ew6rtiqGgHtM+s/mX39cQRVHiaIFibeWk6+X0H7lOzS7f/8 c66O4O1FCb0nxGFiGN3YVPpVnYJLyMasC4O5HZe/mrQ2ocitChiZ+y+oTmzUYVVj8Y dxzndsOM+XUXlziAoTjs2F9+CfXj0kTpYtfV+hq2QNxaDMgLudsjOlZi/oULOZ+Fob guX8zs+eUWbsQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1nhTyA-0004Xc-Fq; Thu, 21 Apr 2022 12:23:27 +0200 From: Johan Hovold To: Andy Gross , Bjorn Andersson , Lorenzo Pieralisi , Kishon Vijay Abraham I , Vinod Koul , "Stephen Boyd" Cc: Rob Herring , Krzysztof Kozlowski , Stanimir Varbanov , =?utf-8?q?Krzysztof_Wilczy=C5=84s?= =?utf-8?q?ki?= , Bjorn Helgaas , Dmitry Baryshkov , Prasad Malisetty , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, Johan Hovold Subject: [PATCH RFC 0/5] phy: qcom-qmp: add support for pipe clock muxing Date: Thu, 21 Apr 2022 12:20:36 +0200 Message-Id: <20220421102041.17345-1-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Some QMP PHYs need to remux to their pipe clock input to the pipe clock output generated by the PHY before powering on the PHY and restore the default source during power down. +---------------+ | PHY block |<<---------------------------------------+ | | +-----+ | | +-------+ | | GCC | | I/P---^-->| PLL |---^--->pipe_clksrc--->|-\ | | clk | +-------+ | | +--|--->pipe_clk---+ | | xo--->|-/ | +---------------+ +-----| This series moves the pipe clock mux handling from PCIe controller driver into the PHY driver which already manages the pipe clock as the PHY is both the producer of the pipe clock as well as its (primary) consumer. This is an alternative to the series posted here https://lore.kernel.org/r/20220413233144.275926-1-dmitry.baryshkov@linaro.org which instead moves the mux handling into the clock drivers and ties remuxing to the gating/ungating of the pipe clock in the GCC. That approach means that it is still possible to have the pipe clock ungated without providing a valid source, somethings which can cause hangs when enabling/disabling the GDSC (presumably as some entity is consuming the pipe clock). Implementing this in the clock drivers also means that the implementation is spread out over multiple files and makes it harder to add support for new SoCs as it may not be clear that every pipe clock mux definition needs to be updated with safe and non-safe parent-clock indexes and an ad-hoc mux ops implementation. The custom mux implementation currently also hides the actual topology of the clock tree by always reporting the pipe mux source as being provided by the PHY (e.g. as reported by debugfs). This series, by contrast, ties the muxing to when the pipe clock source is enabled, that is, when the PHY is powered on, so that the GCC pipe clock always has a valid source. The implementation is more straight-forward, avoids the one-off clock mux implementation, and allows for documenting this once and for all in the PHY driver. Note that the devicetree bindings remains to be updated but that this was left out of this RFC. This series depends on the two qcom-qmp fixlets posted here: https://lore.kernel.org/all/20220420152331.5527-1-johan+linaro@kernel.org/ Johan Dmitry Baryshkov (1): PCI: qcom: Remove unnecessary pipe_clk handling Johan Hovold (4): phy: qcom-qmp: add support for pipe clock muxing arm64: dts: qcom: sc7280: move pipe mux handling to phy PCI: qcom: Drop pipe clock muxing PCI: qcom: Drop unused post-init callbacks arch/arm64/boot/dts/qcom/sc7280.dtsi | 18 ++--- drivers/pci/controller/dwc/pcie-qcom.c | 96 ++------------------------ drivers/phy/qualcomm/phy-qcom-qmp.c | 71 +++++++++++++++++-- 3 files changed, 76 insertions(+), 109 deletions(-)