[0/5] clk: qcom: Add clocks for the QDU1000 and QRU1000 SoCs

This series adds the GCC, RPMh, and PDC clock support required for the
QDU1000 and QRU1000 SoCs along with the devicetree bindings for them.

The Qualcomm Technologies, Inc. Distributed Unit 1000 and Radio Unit
1000 are new SoCs meant for enabling Open RAN solutions. See more at
https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/documents/qualcomm_5g_ran_platforms_product_brief.pdf

This patchset is based on the YAML conversion patch [1] submitted already.

[1] https://lore.kernel.org/r/20220103074348.6039-1-luca.weiss@fairphone.com

Melody Olvera (4):
  dt-bindings: clock: Add QDU1000 and QRU1000 GCC clock bindings
  dt-bindings: clock: Add RPMHCC bindings for QDU1000 and QRU1000
  clk: qcom: Add support for QDU1000 and QRU1000 RPMh clocks
  dt-bindings: clock: Introduce pdc bindings for QDU1000 and QRU1000

Taniya Das (1):
  clk: qcom: Add QDU1000 and QRU1000 GCC support

 .../bindings/clock/qcom,gcc-qdru1000.yaml     |   74 +
 .../bindings/clock/qcom,rpmhcc.yaml           |    2 +
 .../interrupt-controller/qcom,pdc.yaml        |    2 +
 drivers/clk/qcom/Kconfig                      |    8 +
 drivers/clk/qcom/Makefile                     |    1 +
 drivers/clk/qcom/clk-branch.c                 |    5 +
 drivers/clk/qcom/clk-branch.h                 |    2 +
 drivers/clk/qcom/clk-rpmh.c                   |   14 +
 drivers/clk/qcom/gcc-qdru1000.c               | 2649 +++++++++++++++++
 include/dt-bindings/clock/qcom,gcc-qdru1000.h |  170 ++
 10 files changed, 2927 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/clock/qcom,gcc-qdru1000.yaml
 create mode 100644 drivers/clk/qcom/gcc-qdru1000.c
 create mode 100644 include/dt-bindings/clock/qcom,gcc-qdru1000.h


base-commit: 987a926c1d8a40e4256953b04771fbdb63bc7938
prerequisite-patch-id: d3a56569439f223ee220dee951400e18983fee3e

On Sat, 1 Oct 2022 at 06:05, Melody Olvera <quic_molvera@quicinc.com> wrote:
>
> Add support for RMPh clocks for QDU1000 and QRU1000 SoCs.
>
> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
> ---
>  drivers/clk/qcom/clk-rpmh.c | 14 ++++++++++++++
>  1 file changed, 14 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
> index c07cab6905cb..27d11ffac71e 100644
> --- a/drivers/clk/qcom/clk-rpmh.c
> +++ b/drivers/clk/qcom/clk-rpmh.c
> @@ -628,6 +628,18 @@ static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
>         .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks),
>  };
>
> +DEFINE_CLK_RPMH_ARC(qdru1000, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 1);
> +
> +static struct clk_hw *qdru1000_rpmh_clocks[] = {
> +       [RPMH_CXO_CLK]      = &qdru1000_bi_tcxo.hw,
> +       [RPMH_CXO_CLK_A]    = &qdru1000_bi_tcxo_ao.hw,
> +};
> +
> +static const struct clk_rpmh_desc clk_rpmh_qdru1000 = {
> +       .clks = qdru1000_rpmh_clocks,
> +       .num_clks = ARRAY_SIZE(qdru1000_rpmh_clocks),
> +};
> +
>  static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
>                                          void *data)
>  {
> @@ -723,6 +735,8 @@ static const struct of_device_id clk_rpmh_match_table[] = {
>         { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
>         { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
>         { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
> +       { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdru1000},
> +       { .compatible = "qcom,qru1000-rpmh-clk", .data = &clk_rpmh_qdru1000},

Also the list isn't fully sorted, let's target that. Please move your
compat strings into the beginning.

>         { }
>  };
>  MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
> --
> 2.37.3
>

On 10/1/2022 2:03 AM, Dmitry Baryshkov wrote:
> On Sat, 1 Oct 2022 at 06:05, Melody Olvera <quic_molvera@quicinc.com> wrote:
>> Add support for RMPh clocks for QDU1000 and QRU1000 SoCs.
>>
>> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
>> ---
>>  drivers/clk/qcom/clk-rpmh.c | 14 ++++++++++++++
>>  1 file changed, 14 insertions(+)
>>
>> diff --git a/drivers/clk/qcom/clk-rpmh.c b/drivers/clk/qcom/clk-rpmh.c
>> index c07cab6905cb..27d11ffac71e 100644
>> --- a/drivers/clk/qcom/clk-rpmh.c
>> +++ b/drivers/clk/qcom/clk-rpmh.c
>> @@ -628,6 +628,18 @@ static const struct clk_rpmh_desc clk_rpmh_sdx65 = {
>>         .num_clks = ARRAY_SIZE(sdx65_rpmh_clocks),
>>  };
>>
>> +DEFINE_CLK_RPMH_ARC(qdru1000, bi_tcxo, bi_tcxo_ao, "xo.lvl", 0x3, 1);
>> +
>> +static struct clk_hw *qdru1000_rpmh_clocks[] = {
>> +       [RPMH_CXO_CLK]      = &qdru1000_bi_tcxo.hw,
>> +       [RPMH_CXO_CLK_A]    = &qdru1000_bi_tcxo_ao.hw,
>> +};
>> +
>> +static const struct clk_rpmh_desc clk_rpmh_qdru1000 = {
>> +       .clks = qdru1000_rpmh_clocks,
>> +       .num_clks = ARRAY_SIZE(qdru1000_rpmh_clocks),
>> +};
>> +
>>  static struct clk_hw *of_clk_rpmh_hw_get(struct of_phandle_args *clkspec,
>>                                          void *data)
>>  {
>> @@ -723,6 +735,8 @@ static const struct of_device_id clk_rpmh_match_table[] = {
>>         { .compatible = "qcom,sm8350-rpmh-clk", .data = &clk_rpmh_sm8350},
>>         { .compatible = "qcom,sm8450-rpmh-clk", .data = &clk_rpmh_sm8450},
>>         { .compatible = "qcom,sc7280-rpmh-clk", .data = &clk_rpmh_sc7280},
>> +       { .compatible = "qcom,qdu1000-rpmh-clk", .data = &clk_rpmh_qdru1000},
>> +       { .compatible = "qcom,qru1000-rpmh-clk", .data = &clk_rpmh_qdru1000},
> Also the list isn't fully sorted, let's target that. Please move your
> compat strings into the beginning.
Sure thing.
>
>>         { }
>>  };
>>  MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
>> --
>> 2.37.3
>>
Thanks,

Melody