Message ID | 20221111093857.11360-1-johan+linaro@kernel.org |
---|---|
Headers | show |
Series | phy: qcom-qmp-usb: drop sc8280xp reference-clock source | expand |
On Fri, Nov 11, 2022 at 10:38:56AM +0100, Johan Hovold wrote: > The source clock for the reference clock is not used by the PHY directly > and should not be described by the devicetree (instead this relationship > should be modelled in the clock driver). > > Drop the driver management of the reference-clock source for SC8280XP. > > Once the other clock drivers have been updated, the corresponding change > can be done also for the other QMP v4 platforms. > > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> Reviewed-by: Bjorn Andersson <andersson@kernel.org> Regards, Bjorn > --- > drivers/phy/qualcomm/phy-qcom-qmp-usb.c | 20 ++++++++++++-------- > 1 file changed, 12 insertions(+), 8 deletions(-) > > diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c > index 372f9853c749..9b1f8c9d0eb8 100644 > --- a/drivers/phy/qualcomm/phy-qcom-qmp-usb.c > +++ b/drivers/phy/qualcomm/phy-qcom-qmp-usb.c > @@ -1523,6 +1523,10 @@ static const char * const qmp_v3_phy_clk_l[] = { > }; > > static const char * const qmp_v4_phy_clk_l[] = { > + "aux", "ref", "com_aux", > +}; > + > +static const char * const qmp_v4_ref_phy_clk_l[] = { > "aux", "ref_clk_src", "ref", "com_aux", > }; > > @@ -1729,8 +1733,8 @@ static const struct qmp_phy_cfg sm8150_usb3phy_cfg = { > .pcs_tbl_num = ARRAY_SIZE(sm8150_usb3_pcs_tbl), > .pcs_usb_tbl = sm8150_usb3_pcs_usb_tbl, > .pcs_usb_tbl_num = ARRAY_SIZE(sm8150_usb3_pcs_usb_tbl), > - .clk_list = qmp_v4_phy_clk_l, > - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), > + .clk_list = qmp_v4_ref_phy_clk_l, > + .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l), > .reset_list = msm8996_usb3phy_reset_l, > .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), > .vreg_list = qmp_phy_vreg_l, > @@ -1755,8 +1759,8 @@ static const struct qmp_phy_cfg sm8150_usb3_uniphy_cfg = { > .pcs_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_tbl), > .pcs_usb_tbl = sm8150_usb3_uniphy_pcs_usb_tbl, > .pcs_usb_tbl_num = ARRAY_SIZE(sm8150_usb3_uniphy_pcs_usb_tbl), > - .clk_list = qmp_v4_phy_clk_l, > - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), > + .clk_list = qmp_v4_ref_phy_clk_l, > + .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l), > .reset_list = msm8996_usb3phy_reset_l, > .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), > .vreg_list = qmp_phy_vreg_l, > @@ -1806,8 +1810,8 @@ static const struct qmp_phy_cfg sm8250_usb3_uniphy_cfg = { > .pcs_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_tbl), > .pcs_usb_tbl = sm8250_usb3_uniphy_pcs_usb_tbl, > .pcs_usb_tbl_num = ARRAY_SIZE(sm8250_usb3_uniphy_pcs_usb_tbl), > - .clk_list = qmp_v4_phy_clk_l, > - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), > + .clk_list = qmp_v4_ref_phy_clk_l, > + .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l), > .reset_list = msm8996_usb3phy_reset_l, > .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), > .vreg_list = qmp_phy_vreg_l, > @@ -1907,8 +1911,8 @@ static const struct qmp_phy_cfg sm8350_usb3_uniphy_cfg = { > .pcs_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_tbl), > .pcs_usb_tbl = sm8350_usb3_uniphy_pcs_usb_tbl, > .pcs_usb_tbl_num = ARRAY_SIZE(sm8350_usb3_uniphy_pcs_usb_tbl), > - .clk_list = qmp_v4_phy_clk_l, > - .num_clks = ARRAY_SIZE(qmp_v4_phy_clk_l), > + .clk_list = qmp_v4_ref_phy_clk_l, > + .num_clks = ARRAY_SIZE(qmp_v4_ref_phy_clk_l), > .reset_list = msm8996_usb3phy_reset_l, > .num_resets = ARRAY_SIZE(msm8996_usb3phy_reset_l), > .vreg_list = qmp_phy_vreg_l, > -- > 2.37.4 >
On 11/11/2022 12:38, Johan Hovold wrote: > The source clock for the reference clock is not used by the PHY directly > and should not be described by the devicetree (instead this relationship > should be modelled in the clock driver). > > Drop the driver management of the reference-clock source for SC8280XP. > > Once the other clock drivers have been updated, the corresponding change > can be done also for the other QMP v4 platforms. It would be nice to also understand, how does this apply to the sm8250's usb+dp PHY, which has ref_clk_src, but no ref clock. Bjorn, any comments? Other than this question: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 11/11/2022 12:38, Johan Hovold wrote: > The source clock for the reference clock should not be described by the > devicetree binding and instead this relationship should be modelled in > the clock driver. > > Update the USB PHY nodes to match the fixed binding. > > Signed-off-by: Johan Hovold <johan+linaro@kernel.org> > --- > arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 8 ++------ > 1 file changed, 2 insertions(+), 6 deletions(-) Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
On 11-11-22, 10:38, Johan Hovold wrote: > The source clock for the reference clock is not used by the PHY directly > and should not have been included in the devicetree binding. > > As the new SC8280XP binding has been merged for 6.2, we should get this > fixed as soon as possible. Applied, thanks
On Fri, 11 Nov 2022 10:38:54 +0100, Johan Hovold wrote: > The source clock for the reference clock is not used by the PHY directly > and should not have been included in the devicetree binding. > > As the new SC8280XP binding has been merged for 6.2, we should get this > fixed as soon as possible. > > Johan > > [...] Applied, thanks! [3/3] arm64: dts: qcom: sc8280xp: drop reference-clock source commit: 9eb18ed70bd0f78099cb64f691586dbd17923805 Best regards,