| Message ID | 20230118230526.1499328-1-abel.vesa@linaro.org |
|---|---|
| Headers | show |
| Series | arm64: dts: qcom: sm8550: Add PCIe HC and PHY support | expand |
On Wed, Jan 18, 2023 at 05:55:31PM -0600, Bjorn Andersson wrote: > On Thu, 19 Jan 2023 01:05:24 +0200, Abel Vesa wrote: > > This patchset adds PCIe controllers and PHYs support to SM8550 platform > > and enables them on the MTP board. > > > > The v1 was here: > > https://lore.kernel.org/all/20221116130430.2812173-1-abel.vesa@linaro.org/ > > > > Changes since v1: > > * ordered pcie related nodes alphabetically in MTP dts > > * dropped the pipe_mux, phy_pipe and ref clocks from the pcie nodes > > * dropped the child node from the phy nodes, like Johan suggested, > > and updated to use the sc8280xp binding scheme > > * changed "pcie_1_nocsr_com_phy_reset" 2nd reset name of pcie1_phy > > to "nocsr" > > * reordered all pcie nodes properties to look similar to the ones > > from sc8280xp > > > > [...] > > Applied, thanks! > > [1/2] arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes > commit: 7d1158c984d37e79ab8bb55ab152a0b35566cb89 > [2/2] arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes > commit: 1eeef306b5d80494cdb149f058013c3ab43984b4 I believe there were still some changes needed to the controller and PHY bindings so this should not have been merged. https://lore.kernel.org/all/Y8fuUI4xaNkADkWl@hovoldconsulting.com/ https://lore.kernel.org/lkml/Y8giHJMtPu4wTlmA@hovoldconsulting.com/ Perhaps in the future you can send the dts changes along with the (PHY) driver changes so that they can be kept in lock-step and avoid this. Johan
On 23-01-19 08:33:20, Johan Hovold wrote: > On Wed, Jan 18, 2023 at 05:55:31PM -0600, Bjorn Andersson wrote: > > On Thu, 19 Jan 2023 01:05:24 +0200, Abel Vesa wrote: > > > This patchset adds PCIe controllers and PHYs support to SM8550 platform > > > and enables them on the MTP board. > > > > > > The v1 was here: > > > https://lore.kernel.org/all/20221116130430.2812173-1-abel.vesa@linaro.org/ > > > > > > Changes since v1: > > > * ordered pcie related nodes alphabetically in MTP dts > > > * dropped the pipe_mux, phy_pipe and ref clocks from the pcie nodes > > > * dropped the child node from the phy nodes, like Johan suggested, > > > and updated to use the sc8280xp binding scheme > > > * changed "pcie_1_nocsr_com_phy_reset" 2nd reset name of pcie1_phy > > > to "nocsr" > > > * reordered all pcie nodes properties to look similar to the ones > > > from sc8280xp > > > > > > [...] > > > > Applied, thanks! > > > > [1/2] arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes > > commit: 7d1158c984d37e79ab8bb55ab152a0b35566cb89 > > [2/2] arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes > > commit: 1eeef306b5d80494cdb149f058013c3ab43984b4 > > I believe there were still some changes needed to the controller > and PHY bindings so this should not have been merged. > > https://lore.kernel.org/all/Y8fuUI4xaNkADkWl@hovoldconsulting.com/ > https://lore.kernel.org/lkml/Y8giHJMtPu4wTlmA@hovoldconsulting.com/ > > Perhaps in the future you can send the dts changes along with the (PHY) > driver changes so that they can be kept in lock-step and avoid this. Well, that is a bit hard to do, because phy patches are based on linux-phy/next, while dtsi patches are based on Bjorn's tree which, so ... > > Johan
On 23-01-19 13:29:38, Krzysztof Kozlowski wrote: > On 19/01/2023 13:09, Abel Vesa wrote: > > On 23-01-19 08:33:20, Johan Hovold wrote: > >> On Wed, Jan 18, 2023 at 05:55:31PM -0600, Bjorn Andersson wrote: > >>> On Thu, 19 Jan 2023 01:05:24 +0200, Abel Vesa wrote: > >>>> This patchset adds PCIe controllers and PHYs support to SM8550 platform > >>>> and enables them on the MTP board. > >>>> > >>>> The v1 was here: > >>>> https://lore.kernel.org/all/20221116130430.2812173-1-abel.vesa@linaro.org/ > >>>> > >>>> Changes since v1: > >>>> * ordered pcie related nodes alphabetically in MTP dts > >>>> * dropped the pipe_mux, phy_pipe and ref clocks from the pcie nodes > >>>> * dropped the child node from the phy nodes, like Johan suggested, > >>>> and updated to use the sc8280xp binding scheme > >>>> * changed "pcie_1_nocsr_com_phy_reset" 2nd reset name of pcie1_phy > >>>> to "nocsr" > >>>> * reordered all pcie nodes properties to look similar to the ones > >>>> from sc8280xp > >>>> > >>>> [...] > >>> > >>> Applied, thanks! > >>> > >>> [1/2] arm64: dts: qcom: sm8550: Add PCIe PHYs and controllers nodes > >>> commit: 7d1158c984d37e79ab8bb55ab152a0b35566cb89 > >>> [2/2] arm64: dts: qcom: sm8550-mtp: Add PCIe PHYs and controllers nodes > >>> commit: 1eeef306b5d80494cdb149f058013c3ab43984b4 > >> > >> I believe there were still some changes needed to the controller > >> and PHY bindings so this should not have been merged. > >> > >> https://lore.kernel.org/all/Y8fuUI4xaNkADkWl@hovoldconsulting.com/ > >> https://lore.kernel.org/lkml/Y8giHJMtPu4wTlmA@hovoldconsulting.com/ > >> > >> Perhaps in the future you can send the dts changes along with the (PHY) > >> driver changes so that they can be kept in lock-step and avoid this. > > > > Well, that is a bit hard to do, because phy patches are based on > > linux-phy/next, while dtsi patches are based on Bjorn's tree which, > > so ... > > ... which we long time solved by basing your patches on linux-next. > That's the only way for inter-tree patchsets to be properly based. Yeah, I just realized that out after I sent the reply :-) Will send a single patchset which adds both the controller changes, the phy changes and the dts/i changes (including all related bindings updates). > > Best regards, > Krzysztof >