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[0/9] MSM8998 clk cleanups and fixups

Message ID 20230622-topic-8998clk-v1-0-5b7a0d6e98b1@linaro.org
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Series MSM8998 clk cleanups and fixups | expand

Message

Konrad Dybcio June 22, 2023, 11:57 a.m. UTC 
The MSM8998 clock controller drivers have some rough edges around whether
and how Linux should touch them, which this series tries to sand down
a bit.

MSM8998 maple seems not to explode, please give it a spin on your boards.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
---
Konrad Dybcio (9):
      dt-bindings: clk: qcom,gcc-msm8998: Add missing GPU/MMSS GPLL0 legs
      dt-bindings: clock: qcom,mmcc: Add GPLL0_DIV for MSM8998
      clk: qcom: gcc-msm8998: Control MMSS and GPUSS GPLL0 outputs properly
      clk: qcom: mmcc-msm8998: Properly consume GPLL0 inputs
      clk: qcom: gpucc-msm8998: Use the correct GPLL0 leg with old DTs
      clk: qcom: gcc-msm8998: Don't check halt bit on some branch clks
      clk: qcom: gcc-msm8998: Don't poke at some BIMC GPU clocks
      arm64: dts: qcom: msm8998: Use the correct GPLL0 leg for GPUCC
      arm64: dts: qcom: msm8998: Use the correct GPLL0_DIV leg for MMCC

 .../devicetree/bindings/clock/qcom,mmcc.yaml       |  2 +
 arch/arm64/boot/dts/qcom/msm8998.dtsi              |  8 +-
 drivers/clk/qcom/gcc-msm8998.c                     | 92 ++++++++++++++--------
 drivers/clk/qcom/gpucc-msm8998.c                   |  2 +-
 drivers/clk/qcom/mmcc-msm8998.c                    | 35 ++------
 include/dt-bindings/clock/qcom,gcc-msm8998.h       |  3 +
 6 files changed, 80 insertions(+), 62 deletions(-)
---
base-commit: c87d46a9e8ebd2f2c3960927b1d21687096d1109
change-id: 20230622-topic-8998clk-4317986f3008

Best regards,

Comments

Jeffrey Hugo June 22, 2023, 2:41 p.m. UTC | #1 
On 6/22/2023 5:57 AM, Konrad Dybcio wrote:
> GPLL0 has two separate outputs to both GPUSS and MMSS: one that's
> 2-divided and one that runs at the same rate as the GPLL0 itself.
> 
> Add the missing ones to the binding.
> 
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>

Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com>