| Message ID | 20230801085352.22873-1-quic_luoj@quicinc.com |
|---|---|
| Headers | show |
| Series | add clock controller of qca8386/qca8084 | expand |
Quoting Luo Jie (2023-08-01 01:53:50) > Support the clock controller where the HW register is > accessed by MDIO bus, the spin lock can't be used because > of sleep during the MDIO operation. > > Add the flag CLK_ENABLE_MUTEX_LOCK to hint clock framework > to use mutex lock instead of the spin lock. Why can't you enable the MDIO bus clk in .prepare()?
On 8/2/2023 3:16 AM, Randy Dunlap wrote: > > > On 8/1/23 01:53, Luo Jie wrote: >> diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig >> index 263e55d75e3f..a17e8fa5a7e1 100644 >> --- a/drivers/clk/qcom/Kconfig >> +++ b/drivers/clk/qcom/Kconfig >> @@ -195,6 +195,14 @@ config IPQ_GCC_9574 >> i2c, USB, SD/eMMC, etc. Select this for the root clock >> of ipq9574. >> >> +config IPQ_NSSCC_QCA8K >> + tristate "QCA8K(QCA8386 or QCA8084) NSS Clock Controller" >> + help > > The 2 lines above should be indented with one tab (only; no spaces). > >> + Support for NSS(Network SubSystem) clock controller on > > The line above should be indented with one tab + 2 spaces (like the following > 3 lines). > >> + qca8386/qca8084 chip. >> + Say Y if you want to use network function of switch or PHY >> + function. Select this for the root clock of qca8xxx. > thanks Randy for the review, i will update the patch for this.
From: Jie Luo <quic_luoj@quicinc.com> qca8xxx is 4 * 2.5GBaseT ports chip, working as switch mode named by qca8386, working as PHY mode named by qca8084, clock hardware reigster is accessed by MDIO bus. This patch series add the clock controller of qca8363/qca8084, and add the clock flag CLK_ENABLE_MUTEX_LOCK to avoid spin lock used during the clock operation of qca8k clock controller where the sleep happens when accessing clock control register by MDIO bus. Luo Jie (3): clk: Add the flag CLK_ENABLE_MUTEX_LOCK of enabling clock dt-bindings: clock: add qca8386/qca8084 clock and reset definitions clk: qcom: add clock controller driver for qca8386/qca8084 .../bindings/clock/qcom,nsscc-qca8k.yaml | 59 + drivers/clk/clk.c | 78 +- drivers/clk/qcom/Kconfig | 8 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/nsscc-qca8k.c | 2205 +++++++++++++++++ include/dt-bindings/clock/qcom,nsscc-qca8k.h | 102 + include/dt-bindings/reset/qcom,nsscc-qca8k.h | 76 + include/linux/clk-provider.h | 4 + 8 files changed, 2519 insertions(+), 14 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/qcom,nsscc-qca8k.yaml create mode 100644 drivers/clk/qcom/nsscc-qca8k.c create mode 100644 include/dt-bindings/clock/qcom,nsscc-qca8k.h create mode 100644 include/dt-bindings/reset/qcom,nsscc-qca8k.h base-commit: ec89391563792edd11d138a853901bce76d11f44