| Message ID | 20231030-ipq5332-nsscc-v1-0-6162a2c65f0a@quicinc.com |
|---|---|
| Headers | show |
| Series | Add NSS clock controller support for IPQ5332 | expand |
On 30/10/2023 10:47, Kathiravan Thirumoorthy wrote: > gcc_snoc_nssnoc_clk, gcc_snoc_nssnoc_1_clk, gcc_nssnoc_nsscc_clk are > enabled by default and it's RCG is properly configured by bootloader. > > Some of the NSS clocks needs these clocks to be enabled. To avoid > these clocks being disabled by clock framework, drop these entries. This is not the way to prevent Linux from disabling the clocks. The way is to mark them as critical, so I do not think you provided accurate rationale for bindings change. Best regards, Krzysztof
Quoting Kathiravan Thirumoorthy (2023-10-30 02:47:17) > gcc_snoc_nssnoc_clk, gcc_snoc_nssnoc_1_clk, gcc_nssnoc_nsscc_clk are > enabled by default and it's RCG is properly configured by bootloader. > > Some of the NSS clocks needs these clocks to be enabled. To avoid > these clocks being disabled by clock framework, drop these entries. > > Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> > --- Instead of this patch just drop the clks from the table and enable the clks during probe with register writes.
On 10/31/2023 12:26 AM, Stephen Boyd wrote: > Quoting Kathiravan Thirumoorthy (2023-10-30 02:47:17) >> gcc_snoc_nssnoc_clk, gcc_snoc_nssnoc_1_clk, gcc_nssnoc_nsscc_clk are >> enabled by default and it's RCG is properly configured by bootloader. >> >> Some of the NSS clocks needs these clocks to be enabled. To avoid >> these clocks being disabled by clock framework, drop these entries. >> >> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >> --- > > Instead of this patch just drop the clks from the table and enable the > clks during probe with register writes. Thanks for the suggestion Stephen, will handle this way in V2. Between, I think still the entries in the dt-bindings can be dropped along with the entries in the clock table?
On 10/31/2023 12:27 AM, Stephen Boyd wrote: > Quoting Kathiravan Thirumoorthy (2023-10-30 02:47:19) >> Add support for gpll0_out_aux clock which acts as the parent for >> certain networking subsystem (NSS) clocks. >> >> Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> >> --- >> drivers/clk/qcom/gcc-ipq5332.c | 14 ++++++++++++++ >> 1 file changed, 14 insertions(+) >> >> diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c >> index 235849876a9a..966bb7ca8854 100644 >> --- a/drivers/clk/qcom/gcc-ipq5332.c >> +++ b/drivers/clk/qcom/gcc-ipq5332.c >> @@ -87,6 +87,19 @@ static struct clk_alpha_pll_postdiv gpll0 = { >> }, >> }; >> >> +static struct clk_alpha_pll_postdiv gpll0_out_aux = { >> + .offset = 0x20000, >> + .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS], >> + .width = 4, >> + .clkr.hw.init = &(struct clk_init_data) { > > const initdata Thanks for pointing it out. Some of the clock structure doesn't have the "const" qualifier. Will fix all those in V2. > >> + .name = "gpll0_out_aux", >> + .parent_hws = (const struct clk_hw *[]) { >> + &gpll0_main.clkr.hw }, >> + .num_parents = 1, >> + .ops = &clk_alpha_pll_postdiv_ro_ops, >> + }, >> +}; >> + >> static struct clk_alpha_pll gpll2_main = { >> .offset = 0x21000, >> .regs = clk_alpha_pll_regs[CLK_ALPHA_PLL_TYPE_STROMER_PLUS],
Add bindings, driver and devicetree node for networking sub system clock controller on IPQ5332. Some of the nssnoc clocks present in GCC driver is enabled by default and its RCG is configured by bootloaders, so drop those clocks from GCC driver. The NSS clock controller driver depends on the below patchset which adds support for multiple configurations for same frequency. https://lore.kernel.org/linux-arm-msm/20230531222654.25475-1-ansuelsmth@gmail.com/ Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> --- Kathiravan Thirumoorthy (8): clk: qcom: ipq5332: drop the few nssnoc clocks dt-bindings: clock: ipq5332: drop the few nss clocks definition dt-bindings: clock: ipq5332: add definition for GPLL0_OUT_AUX clock clk: qcom: ipq5332: add gpll0_out_aux clock dt-bindings: clock: add IPQ5332 NSSCC clock and reset definitions clk: qcom: add NSS clock Controller driver for IPQ5332 arm64: dts: qcom: ipq5332: add support for the NSSCC arm64: defconfig: build NSS Clock Controller driver for IPQ5332 .../bindings/clock/qcom,ipq5332-nsscc.yaml | 60 ++ arch/arm64/boot/dts/qcom/ipq5332.dtsi | 28 + arch/arm64/configs/defconfig | 1 + drivers/clk/qcom/Kconfig | 7 + drivers/clk/qcom/Makefile | 1 + drivers/clk/qcom/gcc-ipq5332.c | 71 +- drivers/clk/qcom/nsscc-ipq5332.c | 1035 ++++++++++++++++++++ include/dt-bindings/clock/qcom,ipq5332-gcc.h | 4 +- include/dt-bindings/clock/qcom,ipq5332-nsscc.h | 86 ++ 9 files changed, 1233 insertions(+), 60 deletions(-) --- base-commit: c503e3eec382ac708ee7adf874add37b77c5d312 change-id: 20231030-ipq5332-nsscc-aeac9e153045 Best regards,