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Tue, 28 May 2024 13:43:35 -0700 (PDT) Received: from umbar.lan ([192.130.178.91]) by smtp.gmail.com with ESMTPSA id 2adb3069b0e04-5297066b885sm1095493e87.127.2024.05.28.13.43.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 May 2024 13:43:34 -0700 (PDT) From: Dmitry Baryshkov Subject: [PATCH 00/10] dt-bindings: clock: qcom,gcc: handle the controllers without power domains Date: Tue, 28 May 2024 23:43:18 +0300 Message-Id: <20240528-qcom-gdscs-v1-0-03cf1b102a4f@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-B4-Tracking: v=1; b=H4sIAOZBVmYC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE vPSU3UzU4B8JSMDIxMDUyML3cLk/Fzd9JTi5GLdJNNUs+TEtJTEJMsUJaCGgqLUtMwKsGHRsbW 1APWqsyNcAAAA To: Bjorn Andersson , Michael Turquette , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Taniya Das , Robert Marko , Konrad Dybcio Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2208; i=dmitry.baryshkov@linaro.org; h=from:subject:message-id; bh=KdOLoaqqPKKq6B+kbVp/zzlHPVbPXlpj0ygf6uQcA/g=; b=owEBbQGS/pANAwAKAYs8ij4CKSjVAcsmYgBmVkH0W8HCtV9FkP0Fi5jHzl6dxsTXhxkBImCsS aBIyGEyz42JATMEAAEKAB0WIQRMcISVXLJjVvC4lX+LPIo+Aiko1QUCZlZB9AAKCRCLPIo+Aiko 1Yk0B/4wRvE52sN2pOvvOSYjNFMz4MlTqAh8kJsoYWyP+Wn0qe6qheHvtmhVV4qilV5a16iAE/d Onu9bkxcdaOROBgOgZ3VyagFbGEE+8zHXHTSBNaXcaeGOjsk2/6mSVy+m4ZRvLq6er1p0zEax2Z fTJ7vP01NGZZNKqWK5KhwSifUtKEs0Y5fljV1t4eWJFlTdxKyJwhDzahSc8G+bzQQU8HPA9DeIn dkLySM/gEkcNKwKSRuyxNcWHL8h7RPJxr8+yNoZNyOOiXz4rz0EyJ04kCYdegzOSrxjf2NDDos0 hwlQ23DBMqV8Sn9eIPSJg3DRa2IcdYx1p4nsTUfKPe1T1t9X X-Developer-Key: i=dmitry.baryshkov@linaro.org; a=openpgp; fpr=8F88381DD5C873E4AE487DA5199BF1243632046A On some of the Qualcomm platforms the Global Clock Controller doesn't provide power domains to the platform. However the existing qcom,gcc.yaml common schema requires the '#power-domain-cells' property. This results either in a platforms having incorrect property or in DT validation errors. Fix this by splitting the qcom,gcc-nopd.yaml schema, which doesn't define the offensive property and use it for such platforms. Also, while we are at it, fix GCC node name for two platforms and enforce node name in the DT schema. Signed-off-by: Dmitry Baryshkov --- Dmitry Baryshkov (10): dt-bindings: clock: qcom: split the non-PD schema for GCC dt-bindings: clock: qcom,gcc-apq8064: use non-power-domain version of GCC schema dt-bindings: clock: qcom,gcc-msm8660: use non-power-domain version of GCC schema dt-bindings: clock: qcom,gcc-ipq6018: use non-power-domain version of GCC schema dt-bindings: clock: qcom,gcc-nopd.yaml: force node name ARM: dts: qcom: apq8064: drop #power-domain-cells property of GCC ARM: dts: qcom: msm8660: drop #power-domain-cells property of GCC ARM: dts: qcom: msm8960: drop #power-domain-cells property of GCC arm64: dts: qcom: ipq6018: fix GCC node name arm64: dts: qcom: ipq8074: fix GCC node name .../bindings/clock/qcom,gcc-apq8064.yaml | 2 +- .../bindings/clock/qcom,gcc-ipq6018.yaml | 2 +- .../bindings/clock/qcom,gcc-msm8660.yaml | 2 +- .../devicetree/bindings/clock/qcom,gcc-nopd.yaml | 43 ++++++++++++++++++++++ .../devicetree/bindings/clock/qcom,gcc.yaml | 19 ++-------- arch/arm/boot/dts/qcom/qcom-apq8064.dtsi | 1 - arch/arm/boot/dts/qcom/qcom-msm8660.dtsi | 1 - arch/arm/boot/dts/qcom/qcom-msm8960.dtsi | 1 - arch/arm64/boot/dts/qcom/ipq6018.dtsi | 2 +- arch/arm64/boot/dts/qcom/ipq8074.dtsi | 2 +- 10 files changed, 51 insertions(+), 24 deletions(-) --- base-commit: ee3122766a21b81f4014bf7888dee5b9c5af15fa change-id: 20240528-qcom-gdscs-b5e6cafdab9d Best regards,