| Message ID | 20241129-add-displayport-support-for-qcs615-platform-v1-0-09a4338d93ef@quicinc.com |
|---|---|
| Headers | show |
| Series | Add DisplayPort support for QCS615 platform | expand |
On 29/11/2024 08:57, Xiangxu Yin wrote: > Declare the DP QMP PHY present on the Qualcomm QCS615 platforms. > > Signed-off-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> > --- > .../bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 21 +++++++++++++++++++-- > 1 file changed, 19 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > index 1636285fbe535c430fdf792b33a5e9c523de323b..eb21cfe734526fce670c540212a607a016cedf2c 100644 > --- a/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > +++ b/Documentation/devicetree/bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml > @@ -18,6 +18,7 @@ properties: > enum: > - qcom,msm8998-qmp-usb3-phy > - qcom,qcm2290-qmp-usb3-phy > + - qcom,qcs615-qmp-dp-phy > - qcom,qcs615-qmp-usb3-phy > - qcom,sdm660-qmp-usb3-phy > - qcom,sm6115-qmp-usb3-phy > @@ -47,7 +48,7 @@ properties: > const: 0 > > clock-output-names: > - maxItems: 1 > + maxItems: 2 Why all devices now have two clocks? No, this needs lower constraints and further customization per each variant. > > "#phy-cells": > const: 0 > @@ -62,7 +63,8 @@ properties: > items: > - items: > - description: phandle to TCSR hardware block > - - description: offset of the VLS CLAMP register > + - description: offset of the VLS CLAMP register in USB mode > + and offset of the DP Phy mode register in DP mode You change all existing devices, no. > description: Clamp register present in the TCSR > > ports: > @@ -128,6 +130,21 @@ allOf: > - const: com_aux > - const: pipe > > + - if: > + properties: > + compatible: > + contains: > + enum: > + - qcom,qcs615-qmp-dp-phy > + then: > + properties: > + clocks: > + maxItems: 2 > + clock-names: > + items: > + - const: cfg_ahb > + - const: ref Top level says you have minimum 4 clocks, not 2. You need to fix that, if this devices stays in this schema. Anyway your changes suggest device is quite different, so probably should not be here in the first place but in different schema, maybe new one. Best regards, Krzysztof
On 29/11/2024 08:57, Xiangxu Yin wrote: > > + if (of_find_property(pdev->dev.of_node, "dp-hpd-gpio", NULL)) { > + dp->ext_gpio = true; > + dp->gpio_num = of_get_named_gpio(pdev->dev.of_node, "dp-hpd-gpio", 0); > + if (dp->gpio_num < 0) { > + dev_err(&pdev->dev, "Failed to get gpio:%d\n", dp->gpio_num); > + return dp->gpio_num; > + } > + > + if (!gpio_is_valid(dp->gpio_num)) { > + DRM_ERROR("gpio(%d) invalid\n", dp->gpio_num); > + return -EINVAL; > + } > + > + rc = gpio_request(dp->gpio_num, "dp-hpd-gpio"); This is not how you request GPIOs. All this code is just wrong. See Gpiolib API description/document. Or any other driver using GPIOs. Best regards, Krzysztof
On 29/11/2024 08:57, Xiangxu Yin wrote: > Add support for handling HPD (Hot Plug Detect) signals via external > GPIOs connected through pinctrl chips (e.g., Semtech SX1509Q). This > involves reinitializing the relevant GPIO and binding an interrupt > handler to process hot plug events. Since external GPIOs only support > edge interrupts (rising or falling) rather than state interrupts, the > GPIO state must be read during the first DP bridge HPD enablement. This > ensures the current connection state is determined and a hot plug event > is reported accordingly. > > Signed-off-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> > --- > drivers/gpu/drm/msm/dp/dp_display.c | 83 +++++++++++++++++++++++++++++++++++++ > 1 file changed, 83 insertions(+) > > diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c > index eb6fb76c68e505fafbec563440e9784f51e1894b..22c288ca61b9b444a7b8d4a574c614bfef9d88be 100644 > --- a/drivers/gpu/drm/msm/dp/dp_display.c > +++ b/drivers/gpu/drm/msm/dp/dp_display.c > @@ -13,6 +13,8 @@ > #include <linux/delay.h> > #include <drm/display/drm_dp_aux_bus.h> > #include <drm/drm_edid.h> > +#include <linux/gpio/consumer.h> > +#include <linux/of_gpio.h> > > #include "msm_drv.h" > #include "msm_kms.h" > @@ -78,6 +80,10 @@ struct msm_dp_display_private { > > unsigned int id; > > + bool ext_gpio; > + int gpio_num; > + struct work_struct gpio_work; > + > /* state variables */ > bool core_initialized; > bool phy_initialized; > @@ -1182,6 +1188,42 @@ static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id) > return ret; > } > > + > +static void msm_dp_gpio_work_handler(struct work_struct *work) > +{ > + struct msm_dp_display_private *dp = container_of(work, > + struct msm_dp_display_private, gpio_work); > + struct gpio_desc *desc; > + bool hpd; > + > + if (dp->ext_gpio) { > + desc = gpio_to_desc(dp->gpio_num); > + if (!desc) { > + pr_err("Failed to get gpio_desc for GPIO %d\n", dp->gpio_num); > + return; > + } > + > + hpd = gpiod_get_value_cansleep(desc); > + if (hpd) > + msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0); > + else > + msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0); > + } > +} > + > +static irqreturn_t msm_dp_gpio_isr(int unused, void *data) > +{ > + struct msm_dp_display_private *dp = data; > + > + if (!dp) { > + DRM_ERROR("NULL data\n"); > + return IRQ_NONE; > + } > + > + schedule_work(&dp->gpio_work); this msm_dp_gpio_isr is already threaded, would would you also schedule a work ? > + return IRQ_HANDLED; > +} > + > static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) > { > int rc = 0; > @@ -1193,6 +1235,21 @@ static int msm_dp_display_request_irq(struct msm_dp_display_private *dp) > return dp->irq; > } > > + if (dp->ext_gpio) { > + int edge, gpio_irq; > + > + gpio_irq = gpio_to_irq(dp->gpio_num); But as Dmitry reported, the system should use a dp-connected as a next bridge instead which already supports all this much better: drivers/gpu/drm/bridge/display-connector.c Documentation/devicetree/bindings/display/connector/dp-connector.yaml > + edge = IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING; > + > + rc = devm_request_threaded_irq(&pdev->dev, gpio_irq, NULL, > + msm_dp_gpio_isr, edge, "dp_gpio_isr", dp); > + if (rc < 0) { > + DRM_ERROR("failed to request ext-gpio IRQ%u: %d\n", > + gpio_irq, rc); > + return rc; > + } > + } > + > rc = devm_request_irq(&pdev->dev, dp->irq, msm_dp_display_irq_handler, > IRQF_TRIGGER_HIGH|IRQF_NO_AUTOEN, > "dp_display_isr", dp); > @@ -1308,10 +1365,32 @@ static int msm_dp_display_probe(struct platform_device *pdev) > return -EPROBE_DEFER; > } > > + if (of_find_property(pdev->dev.of_node, "dp-hpd-gpio", NULL)) { > + dp->ext_gpio = true; > + dp->gpio_num = of_get_named_gpio(pdev->dev.of_node, "dp-hpd-gpio", 0); > + if (dp->gpio_num < 0) { > + dev_err(&pdev->dev, "Failed to get gpio:%d\n", dp->gpio_num); > + return dp->gpio_num; > + } > + > + if (!gpio_is_valid(dp->gpio_num)) { > + DRM_ERROR("gpio(%d) invalid\n", dp->gpio_num); > + return -EINVAL; > + } > + > + rc = gpio_request(dp->gpio_num, "dp-hpd-gpio"); > + if (rc) { > + dev_err(&pdev->dev, "Failed to request gpio:%d\n", dp->gpio_num); > + return rc; > + } > + gpio_direction_input(dp->gpio_num); > + } > + > /* setup event q */ > mutex_init(&dp->event_mutex); > init_waitqueue_head(&dp->event_q); > spin_lock_init(&dp->event_lock); > + INIT_WORK(&dp->gpio_work, msm_dp_gpio_work_handler); > > /* Store DP audio handle inside DP display */ > dp->msm_dp_display.msm_dp_audio = dp->audio; > @@ -1678,6 +1757,10 @@ void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge) > msm_dp_catalog_hpd_config_intr(dp->catalog, DP_DP_HPD_INT_MASK, true); > > msm_dp_display->internal_hpd = true; > + > + if (dp->ext_gpio) > + schedule_work(&dp->gpio_work); > + > mutex_unlock(&dp->event_mutex); > } > >
This series aims to extend the USB-C PHY to support DP mode and enable DisplayPort on the Qualcomm QCS615 platform. The devicetree modification for DisplayPort on QCS615 will be provided in a future patch. Signed-off-by: Xiangxu Yin <quic_xiangxuy@quicinc.com> --- Xiangxu Yin (8): dt-bindings: display/msm: Document DP on QCS615 dt-bindings: phy: qcom,msm8998-qmp-usb3-phy: Add DP support for QCS615 phy: qcom: qmp-usbc: Add DP phy mode support on QCS615 drm/msm/dp: Add DisplayPort support for QCS615 drm/msm/dp: Add support for lane mapping configuration drm/msm/dp: Add maximum width limitation for modes drm/msm/dp: Retry Link Training 2 with lower pattern drm/msm/dp: Support external GPIO HPD with 3rd pinctrl chip .../bindings/display/msm/dp-controller.yaml | 13 + .../bindings/phy/qcom,msm8998-qmp-usb3-phy.yaml | 21 +- drivers/gpu/drm/msm/dp/dp_catalog.c | 11 +- drivers/gpu/drm/msm/dp/dp_catalog.h | 2 +- drivers/gpu/drm/msm/dp/dp_ctrl.c | 36 +- drivers/gpu/drm/msm/dp/dp_display.c | 87 ++ drivers/gpu/drm/msm/dp/dp_display.h | 1 + drivers/gpu/drm/msm/dp/dp_panel.c | 26 +- drivers/gpu/drm/msm/dp/dp_panel.h | 4 + drivers/phy/qualcomm/phy-qcom-qmp-dp-phy.h | 1 + drivers/phy/qualcomm/phy-qcom-qmp-usbc.c | 1453 +++++++++++++++++--- 11 files changed, 1438 insertions(+), 217 deletions(-) --- base-commit: f486c8aa16b8172f63bddc70116a0c897a7f3f02 change-id: 20241129-add-displayport-support-for-qcs615-platform-f31b6dc83919 Best regards,