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[v3,0/8] clks: qcom: Introduce clks for SM8750

Message ID 20241204-sm8750_master_clks-v3-0-1a8f31a53a86@quicinc.com
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Series clks: qcom: Introduce clks for SM8750 | expand

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Melody Olvera Dec. 4, 2024, 7:37 p.m. UTC 
Add GCC, RPMH, and TCSR clocks for the SM8750 SoC.

The Qualcomm Technologies, Inc. SM8750 SoC is the latest in the line of
consumer mobile device SoCs. See more at:
https://www.qualcomm.com/content/dam/qcomm-martech/dm-assets/images/company/news-media/media-center/press-kits/snapdragon-summit-2024/day-1/documents/Snapdragon8EliteProductBrief.pdf

Changes in V3:
- removed unused rfclka4 and rfclka5 from clk-rpmh [Dmitry]
- split the SC7280 match table to a new commit [Dmitry]
- There are bindings difference between SM8650 and SM8750, so bring back
  the v1 binding https://patchwork.kernel.org/project/linux-clk/patch/20241021230359.2632414-5-quic_molvera@quicinc.com/
  and fix the unused bindings.
- Update the DT indexes as per the GCC bindings
- Use the qcom_cc_probe() instead of qcom_cc_really_probe() for TCSRCC [Dmitry]

Changes in V2:
- removed unneeded rpmh macros, bcm ops
- renamed CXO_PAD to CXO
- ordered rpmh compatibles in alpha order
- reordered clk_alpha_pll regs
- removed redundant bindings for sm8750
- revised gcc driver for pcie 0

Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
---
Taniya Das (8):
      dt-bindings: clock: qcom-rpmhcc: Add RPMHCC for SM8750
      clk: qcom: rpmh: Sort the match table alphabetically
      clk: qcom: rpmh: Add support for SM8750 rpmh clocks
      clk: qcom: clk-alpha-pll: Add support for controlling Taycan PLLs
      dt-bindings: clock: qcom: Add SM8750 GCC
      clk: qcom: Add support for GCC on SM8750
      dt-bindings: clock: qcom: Document the SM8750 TCSR Clock Controller
      clk: qcom: Add TCSR clock driver for SM8750

 .../devicetree/bindings/clock/qcom,rpmhcc.yaml     |    1 +
 .../bindings/clock/qcom,sm8550-tcsr.yaml           |    2 +
 .../devicetree/bindings/clock/qcom,sm8750-gcc.yaml |   62 +
 drivers/clk/qcom/Kconfig                           |   17 +
 drivers/clk/qcom/Makefile                          |    2 +
 drivers/clk/qcom/clk-alpha-pll.c                   |   14 +
 drivers/clk/qcom/clk-alpha-pll.h                   |    7 +
 drivers/clk/qcom/clk-rpmh.c                        |   26 +-
 drivers/clk/qcom/gcc-sm8750.c                      | 3274 ++++++++++++++++++++
 drivers/clk/qcom/tcsrcc-sm8750.c                   |  141 +
 include/dt-bindings/clock/qcom,sm8750-gcc.h        |  226 ++
 include/dt-bindings/clock/qcom,sm8750-tcsr.h       |   15 +
 12 files changed, 3786 insertions(+), 1 deletion(-)
---
base-commit: bcf2acd8f64b0a5783deeeb5fd70c6163ec5acd7
change-id: 20241204-sm8750_master_clks-e26e1b9416b6

Best regards,

Comments

Melody Olvera Dec. 5, 2024, 6 p.m. UTC | #1 
On 12/5/2024 1:28 AM, Krzysztof Kozlowski wrote:
> On Wed, Dec 04, 2024 at 11:37:17AM -0800, Melody Olvera wrote:
>> From: Taniya Das <quic_tdas@quicinc.com>
>>
>> Add device tree bindings for the global clock controller on Qualcomm
>> SM8750 platform.
>>
>> Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
>> Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
>> ---
>>   .../devicetree/bindings/clock/qcom,sm8750-gcc.yaml |  62 ++++++
>>   include/dt-bindings/clock/qcom,sm8750-gcc.h        | 226 +++++++++++++++++++++
>>   2 files changed, 288 insertions(+)
>>
>> diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml
>> new file mode 100644
>> index 0000000000000000000000000000000000000000..aab7039fd28db2f4e2a6b9b7a6340d17ad05156d
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/qcom,sm8750-gcc.yaml
>> @@ -0,0 +1,62 @@
>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/qcom,sm8750-gcc.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: Qualcomm Global Clock & Reset Controller on SM8750
>> +
>> +maintainers:
>> +  - Taniya Das <quic_tdas@quicinc.com>
>> +
>> +description: |
>> +  Qualcomm global clock control module provides the clocks, resets and power
>> +  domains on SM8750
>> +
>> +  See also: include/dt-bindings/clock/qcom,sm8750-gcc.h
>> +
>> +properties:
>> +  compatible:
>> +    const: qcom,sm8750-gcc
>> +
>> +  clocks:
>> +    items:
>> +      - description: Board XO source
>> +      - description: Board Always On XO source
>> +      - description: Sleep clock source
>> +      - description: PCIE 0 Pipe clock source
> Are you absolutely sure there is no PCIE 1 Pipe clock? List will only be
> able to grow at the end, breaking the order, if it turns out there is
> such clock input.

Yes; I've checked all our dts and documentation and as far as I can 
tell, there's
no PCIE 1 pipe clk.

Thanks,
Melody

> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
>