Message ID | 20250121120901.1841142-1-quic_vikramsa@quicinc.com |
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Tue, 21 Jan 2025 12:09:26 +0000 (GMT) Received: from nasanex01b.na.qualcomm.com (nasanex01b.na.qualcomm.com [10.46.141.250]) by NASANPPMTA01.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id 50LC9Pwd015782 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 21 Jan 2025 12:09:25 GMT Received: from hu-vikramsa-hyd.qualcomm.com (10.80.80.8) by nasanex01b.na.qualcomm.com (10.46.141.250) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.9; Tue, 21 Jan 2025 04:09:16 -0800 From: Vikram Sharma <quic_vikramsa@quicinc.com> To: <rfoss@kernel.org>, <todor.too@gmail.com>, <bryan.odonoghue@linaro.org>, <mchehab@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>, <conor+dt@kernel.org>, <akapatra@quicinc.com>, <hariramp@quicinc.com>, <andersson@kernel.org>, <konradybcio@kernel.org>, <hverkuil-cisco@xs4all.nl>, <cros-qcom-dts-watchers@chromium.org>, <catalin.marinas@arm.com>, <will@kernel.org> CC: <linux-arm-kernel@lists.infradead.org>, <quic_vikramsa@quicinc.com>, <linux-media@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>, <kernel@quicinc.com> Subject: [PATCH v1 0/2] Update clocks for sc7280-camss Date: Tue, 21 Jan 2025 17:38:59 +0530 Message-ID: <20250121120901.1841142-1-quic_vikramsa@quicinc.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nasanex01b.na.qualcomm.com (10.46.141.250) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: iLj2eIVwCmQD8f6xHerIgWtpfvpRjaOq X-Proofpoint-ORIG-GUID: iLj2eIVwCmQD8f6xHerIgWtpfvpRjaOq X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1057,Hydra:6.0.680,FMLib:17.12.68.34 definitions=2025-01-21_05,2025-01-21_02,2024-11-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 mlxscore=0 mlxlogscore=889 clxscore=1015 impostorscore=0 lowpriorityscore=0 adultscore=0 bulkscore=0 suspectscore=0 malwarescore=0 priorityscore=1501 spamscore=0 phishscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2411120000 definitions=main-2501210100 |
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Update clocks for sc7280-camss
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This one is a follow-up change for series. https://lore.kernel.org/linux-arm-msm/20241206191900.2545069-1-quic_vikramsa@quicinc.com/ We have got comments on our dtsi change to update clock names as - GCC_CAMERA_AHB_CLK is always enabled clock so it can be removed. - Change clock name from gcc_cam_hf_axi to `gcc_axi_hf` for consistency. - Add gcc_axi_sf as missing to enable it can have undefined hw behaviour. So to handle these comments in our base series we need to update documentaion and driver (already merged) to work with dtsi. We are not breaking ABI here because the ABI hasn't been cemented yet as the dtsi changes are not merged yet also there are no users for this driver as of now. Used following tools for the sanity check of these changes. - make CHECK_DTBS=y W=1 DT_SCHEMA_FILES=media/qcom,sc7280-camss.yaml - make DT_CHECKER_FLAGS=-m W=1 DT_SCHEMA_FILES=media/qcom,sc7280-camss.yaml dt_binding_check - make -j32 W=1 - ./scripts/checkpatch.pl Signed-off-by: Vikram Sharma <quic_vikramsa@quicinc.com> Vikram Sharma (2): media: dt-bindings: update clocks for sc7280-camss media: qcom: camss: update clock names for sc7280 .../bindings/media/qcom,sc7280-camss.yaml | 10 +++++----- drivers/media/platform/qcom/camss/camss.c | 15 ++++++++++----- 2 files changed, 15 insertions(+), 10 deletions(-)