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[V8,0/7] Add EPSS L3 provider support on SA8775P SoC

Message ID 20250205182743.915-1-quic_rlaggysh@quicinc.com
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Series Add EPSS L3 provider support on SA8775P SoC | expand

Message

Raviteja Laggyshetty Feb. 5, 2025, 6:27 p.m. UTC 
Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs.

Current interconnect framework is based on static IDs for creating node
and registering with framework. This becomes a limitation for topologies
where there are multiple instances of same interconnect provider.
Modified interconnect framework APIs to create and link icc node with
dynamic IDs, this will help to overcome the dependency on static IDs.

Change since v7:
 - Updated interconnect framework APIs icc_node_create() and
   icc_link_create() to dynamically allocate IDs for interconnect nodes
   during creation.
 - Moved naming conventions to the framework and replaced snprintf() with
   devm_kasprintf() as suggested.
 - Updated the icc-rpmh driver and SA8775P SoC provider driver to support
   dynamic ID allocation.
 - Revised commit text to explain the use of the existing generic 
   compatible "qcom,epss-l3".
 - Addressed other comments regarding the alphabetical ordering of 
   compatible properties.

Change since v6:
 - Added icc_node_create_alloc_id() API to dynamically allocate ID while
   creating the node. Replaced the IDA (ID allocator) with
   icc_node_create_alloc_id() API to allocate node IDs dynamically.
 - Removed qcom,epss-l3-perf generic compatible as per the comment.
 - Added L3 ICC handles for CPU0 and CPU4 in DT, as per Bjorn comment.
   Link to comment:
   https://lore.kernel.org/lkml/ww3t3tu7p36qzlhcetaxif2xzrpgslydmuqo3fqvisbuar4bjh@qc2u43dck3qi/

Change since v5:
 - Reused qcom,sm8250-epss-l3 compatible for sa8775p SoC.
 - Rearranged the patches, moved dt changes to end of series.
 - Updated the commit text.

Changes since v4:
 - Added generic compatible "qcom,epss-l3-perf" and split the driver
   changes accordingly.

Changes since v3:
 - Removed epss-l3-perf generic compatible changes. These will be posted
   as separate patch until then SoC specific compatible will be used for
   probing.

Changes since v2:
 - Updated the commit text to reflect the reason for code change.
 - Added SoC-specific and generic compatible to driver match table.

Changes since v1:
 - Removed the usage of static IDs and implemented dynamic ID assignment
   for icc nodes using IDA.
 - Removed separate compatibles for cl0 and cl1. Both cl0 and cl1
   devices use the same compatible.
 - Added new generic compatible for epss-l3-perf.

Jagadeesh Kona (1):
  arm64: dts: qcom: sa8775p: Add CPU OPP tables to scale DDR/L3

Raviteja Laggyshetty (6):
  dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P
  interconnect: core: Add dynamic id allocation support
  interconnect: qcom: Add multidev EPSS L3 support
  interconnect: qcom: icc-rpmh: Add dynamic icc node id support
  interconnect: qcom: sa8775p: Add dynamic icc node id support
  arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider

 .../bindings/interconnect/qcom,osm-l3.yaml    |    1 +
 arch/arm64/boot/dts/qcom/sa8775p.dtsi         |  229 ++
 drivers/interconnect/core.c                   |   13 +-
 drivers/interconnect/qcom/icc-rpmh.c          |   16 +-
 drivers/interconnect/qcom/icc-rpmh.h          |    3 +-
 drivers/interconnect/qcom/osm-l3.c            |   46 +-
 drivers/interconnect/qcom/sa8775p.c           | 2194 ++++++++---------
 7 files changed, 1246 insertions(+), 1256 deletions(-)