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Add PCS support for Qualcomm IPQ9574 SoC
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The 'UNIPHY' PCS block in the Qualcomm IPQ9574 SoC provides Ethernet PCS and SerDes functions. It supports 1Gbps mode PCS and 10-Gigabit mode PCS (XPCS) functions, and supports various interface modes for the connectivity between the Ethernet MAC and the external PHYs/Switch. There are three UNIPHY (PCS) instances in IPQ9574, supporting the six Ethernet ports. This patch series adds base driver support for initializing the PCS, and PCS phylink ops for managing the PCS modes/states. Support for SGMII/QSGMII (PCS) and USXGMII (XPCS) modes is being added initially. The Ethernet driver which handles the MAC operations will create the PCS instances and phylink for the MAC, by utilizing the API exported by this driver. While support is being added initially for IPQ9574, the driver is expected to be easily extendable later for other SoCs in the IPQ family such as IPQ5332. Signed-off-by: Lei Wei <quic_leiwei@quicinc.com> --- Changes in v5: - Add a comment in "ipq_pcs_enable" to note that the RX clock is not disabled as PHYLINK does not unwind the state back. - Add PCS device compatible string check for the device node in "ipq_pcs_get". - Link to v4: https://lore.kernel.org/r/20250108-ipq_pcs_net-next-v4-0-0de14cd2902b@quicinc.com Changes in v4: - Add "COMMON_CLK" to the Kconfig dependency option. - Optimize to avoid indentation in "ipq_pcs_config_usxgmii". - Remove the PCS config lock. - Add the "pcs_inband_caps" method. - Link to v3: https://lore.kernel.org/r/20241216-ipq_pcs_6-13_rc1-v3-0-3abefda0fc48@quicinc.com Changes in v3: - Remove the clk enabled check in "pcs_disable" method. - Add "pcs_validate" method to validate supported interface mode and duplex mode. - Use regmap_set_bits()/regmap_clear_bits() API where appropriate. - Collect Reviewed-by tag for dtbindings. - Link to v2: https://lore.kernel.org/r/20241204-ipq_pcs_rc1-v2-0-26155f5364a1@quicinc.com Changes in v2: - dtbindings updates a.) Rename dt-binding header file to match binding file name. b.) Drop unused labels and the redundant examples. c.) Rename "mii_rx"/"mii_tx" clock names to "rx"/"tx". - Rename "PCS_QCOM_IPQ" with specific name "PCS_QCOM_IPQ9574" in Kconfig. - Remove interface mode check for the PCS lock. - Use Cisco SGMII AN mode as default SGMII/QSGMII AN mode. - Instantiate MII PCS instances in probe and export "ipq_pcs_get" and "ipq_pcs_put" APIs. - Move MII RX and TX clock enable and disable to "pcs_enable" and "pcs_disable" methods. - Change "dev_dbg" to "dev_dbg_ratelimited" in "pcs_get_state" method. - Link to v1: https://lore.kernel.org/r/20241101-ipq_pcs_rc1-v1-0-fdef575620cf@quicinc.com --- Lei Wei (5): dt-bindings: net: pcs: Add Ethernet PCS for Qualcomm IPQ9574 SoC net: pcs: Add PCS driver for Qualcomm IPQ9574 SoC net: pcs: qcom-ipq9574: Add PCS instantiation and phylink operations net: pcs: qcom-ipq9574: Add USXGMII interface mode support MAINTAINERS: Add maintainer for Qualcomm IPQ9574 PCS driver .../bindings/net/pcs/qcom,ipq9574-pcs.yaml | 190 +++++ MAINTAINERS | 9 + drivers/net/pcs/Kconfig | 9 + drivers/net/pcs/Makefile | 1 + drivers/net/pcs/pcs-qcom-ipq9574.c | 884 +++++++++++++++++++++ include/dt-bindings/net/qcom,ipq9574-pcs.h | 15 + include/linux/pcs/pcs-qcom-ipq9574.h | 15 + 7 files changed, 1123 insertions(+) --- base-commit: 2014c95afecee3e76ca4a56956a936e23283f05b change-id: 20250207-ipq_pcs_6-14_rc1-09216322b7ce Best regards,