| Message ID | 20250214-concurrent-wb-v6-0-a44c293cf422@quicinc.com |
|---|---|
| Headers | show |
| Series | drm/msm/dpu: Add Concurrent Writeback Support for DPU 10.x+ | expand |
On Fri, Feb 14, 2025 at 04:14:29PM -0800, Jessica Zhang wrote: > Currently, our hardware only supports a single output using CDM block at > most. Because of this, we cannot support cases where both writeback and DP > output request CDM simultaneously > > To avoid this happening when CWB is enabled, change > msm_display_topoloy.needs_cdm into a num_cdm counter to track how many > outputs are requesting CDM block. Return EINVAL if multiple outputs are > trying to reserve CDM. > > Signed-off-by: Jessica Zhang <quic_jesszhan@quicinc.com> > --- > Changes in v6: > - cdm_requested -> num_cdm > > Changes in v5: > - Changed check to fail only if multiple outputs are requesting CDM > simultaneously > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 4 ++-- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 +++++++++--- > drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 5 +++-- > 3 files changed, 14 insertions(+), 7 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > index ad969a5b9434..0e4f27da9534 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c > @@ -692,10 +692,10 @@ void dpu_encoder_update_topology(struct drm_encoder *drm_enc, > fb = conn_state->writeback_job->fb; > > if (fb && MSM_FORMAT_IS_YUV(msm_framebuffer_format(fb))) > - topology->needs_cdm = true; > + topology->num_cdm++; > } else if (disp_info->intf_type == INTF_DP) { > if (msm_dp_is_yuv_420_enabled(priv->dp[disp_info->h_tile_instance[0]], adj_mode)) > - topology->needs_cdm = true; > + topology->num_cdm++; > } > } > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > index 0fbb92021b18..4da2e47265d4 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c > @@ -585,7 +585,8 @@ static int _dpu_rm_reserve_dsc(struct dpu_rm *rm, > > static int _dpu_rm_reserve_cdm(struct dpu_rm *rm, > struct dpu_global_state *global_state, > - uint32_t crtc_id) > + uint32_t crtc_id, > + int num_cdm) > { > /* try allocating only one CDM block */ > if (!rm->cdm_blk) { > @@ -593,6 +594,11 @@ static int _dpu_rm_reserve_cdm(struct dpu_rm *rm, > return -EIO; > } > > + if (num_cdm > 1) { > + DPU_ERROR("More than 1 INTF requesting CDM\n"); I think we should downgrade those to DPU_DEBUG or something like that, but that can go separately, or when picking the patch up. Nevertheless: Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> > + return -EINVAL; > + } > + > if (global_state->cdm_to_crtc_id) { > DPU_ERROR("CDM_0 is already allocated\n"); > return -EIO;
DPU supports a single writeback session running concurrently with primary display when the CWB mux is configured properly. This series enables clone mode for DPU driver and adds support for programming the CWB mux in cases where the hardware has dedicated CWB pingpong blocks. Currently, the CWB hardware blocks have only been added to the SM8650 hardware catalog and only DSI has been exposed as a possible_clone of WB. This changes are split into two parts: The first part of the series will pull in Dmitry's patches to refactor the DPU resource manager to be based off of CRTC instead of encoder. This includes some changes (noted in the relevant commits) by me and Abhinav to fix some issues with getting the global state and refactoring the CDM allocation to work with Dmitry's changes. The second part of the series will add support for CWB by doing the following: 1) Add the CWB mux to the hardware catalog and clarify the pingpong block index enum to specifiy which pingpong blocks are dedicated to CWB only and which ones are general use pingpong blocks 2) Add support for configuring the CWB mux via dpu_hw_cwb ops 3) Add pending flush support for CWB 4) Add support for validating clone mode in the DPU CRTC and setting up CWB within the encoder 5) Adjust the encoder trigger flush, trigger start, and kickoff order to accomodate clone mode 6) Adjust when the frame done timer is started for clone mode 7) Define the possible clones for DPU encoders so that WB encoders can be cloned by non-WB encoders The feature was tested on SM8650 using IGT's kms_writeback test with the following change [1] and dumping the writeback framebuffer when in clone mode. I haven't gotten the chance to test it on DP yet, but I've validated both single and dual LM on DSI. To test CWB with IGT, you'll need to apply this series [1] and run the following command to dump the writeback buffer: IGT_FRAME_DUMP_PATH=<dump path> FRAME_PNG_FILE_NAME=<file name> \ ./build/tests/kms_writeback -d [--run-subtest dump-valid-clones] \ You can also do CRC validation by running this command: ./build/tests/kms_writeback [--run-subtest dump-valid-clones] Note: When running IGT on SC7180, you will also need this IGT fix [2] to prevent IGT tests from failing after runningt kms_color@ctm-* tests. [1] https://patchwork.freedesktop.org/series/137933/ [2] https://patchwork.freedesktop.org/series/144911/ --- Changes in v6: - Don't return early from dpu_crtc_assign_resources() if encoder mask is 0 - Dropped duplicate initialization and unnecessary clearing of the crtc state - Fixed b4 dependencies list (Dmitry) - cdm_requested -> num_cdm (Dmitry) - Added comment doc on why we can use the RM array index to enforce the CWB odd/even rule (Dmitry) - Link to v5: https://lore.kernel.org/r/20250128-concurrent-wb-v5-0-6464ca5360df@quicinc.com Changes in v5: - Rebased onto MSM modeset fixes series (Dmitry) - Reordered RM refactor patches to prevent breaking CI and to avoid breaking when partially applied (Dmitry) - Switch CWB resource reservation to reserve CWB mux first (Dmitry) - Reworded commit messages to be clearer (Dmitry) - Change CDM check to fail only if both DP and WB outputs are requesting the CDM block simultaneously (Dmitry) - Use helper to grab dsc config in dpu_encoder_update_topology - Link to v4: https://lore.kernel.org/r/20241216-concurrent-wb-v4-0-fe220297a7f0@quicinc.com Changes in v4: - Rebased onto latest msm-next - Added kunit tests for framework changes - Skip valid clone check for encoders that don't have any possible clones set (this is to avoid failing kunit tests, specifically the HDMI state helper tests) - Link to v3: https://lore.kernel.org/r/20241016-concurrent-wb-v3-0-a33cf9b93835@quicinc.com Changes in v3: - Dropped support for CWB on DP connectors for now - Dropped unnecessary PINGPONG array in *_setup_cwb() - Add a check to make sure CWB and CDM aren't supported simultaneously (Dmitry) - Document cwb_enabled checks in dpu_crtc_get_topology() (Dmitry) - Moved implementation of drm_crtc_in_clone_mode() to drm_crtc.c (Jani) - Dropped duplicate error message for reserving CWB resources (Dmitry) - Added notes in framework changes about posting a separate series to add proper KUnit tests (Maxime) - Added commit message note addressing Sima's comment on handling mode_changed (Dmitry) - Formatting fixes (Dmitry) - Added proper kerneldocs (Dmitry) - Renamed dpu_encoder_helper_get_cwb() -> *_get_cwb_mask() (Dmitry) - Capitalize all instances of "pingpong" in comments (Dmitry) - Link to v2: https://lore.kernel.org/r/20240924-concurrent-wb-v2-0-7849f900e863@quicinc.com Changes in v2: - Moved CWB hardware programming to its own dpu_hw_cwb abstraction (Dmitry) - Reserve and get assigned CWB muxes using RM API and KMS global state (Dmitry) - Dropped requirement to have only one CWB session at a time - Moved valid clone mode check to DRM framework (Dmitry and Ville) - Switch to default CWB tap point to LM as the DSPP - Dropped printing clone mode status in atomic state (Dmitry) - Call dpu_vbif_clear_errors() before dpu_encoder_kickoff() (Dmitry) - Squashed setup_input_ctrl() and setup_input_mode() into a single dpu_hw_cwb op (Dmitry) - Moved function comment docs to correct place and fixed wording of comments/commit messages (Dmitry) - Grabbed old CRTC state using proper drm_atomic_state API in dpu_crtc_atomic_check() (Dmitry) - Split HW catalog changes of adding the CWB mux block and changing the dedicated CWB pingpong indices into 2 separate commits (Dmitry) - Moved clearing the dpu_crtc_state.num_mixers to "drm/msm/dpu: fill CRTC resources in dpu_crtc.c" (Dmitry) - Fixed alignment and other formatting issues (Dmitry) - Link to v1: https://lore.kernel.org/r/20240829-concurrent-wb-v1-0-502b16ae2ebb@quicinc.com --- Dmitry Baryshkov (3): drm/msm/dpu: fill CRTC resources in dpu_crtc.c drm/msm/dpu: move resource allocation to CRTC drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation Jessica Zhang (11): drm/msm/dpu: Add CWB to msm_display_topology drm/msm/dpu: Require modeset if clone mode status changes drm/msm/dpu: Fail atomic_check if multiple outputs request CDM block drm/msm/dpu: Reserve resources for CWB drm/msm/dpu: Configure CWB in writeback encoder drm/msm/dpu: Support CWB in dpu_hw_ctl drm/msm/dpu: Adjust writeback phys encoder setup for CWB drm/msm/dpu: Start frame done timer after encoder kickoff drm/msm/dpu: Skip trigger flush and start for CWB drm/msm/dpu: Reorder encoder kickoff for CWB drm/msm/dpu: Set possible clones for all encoders drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 222 ++++++++++- drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 3 + drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 418 ++++++++++++--------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 16 +- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 7 +- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys_wb.c | 16 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.c | 30 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_ctl.h | 15 +- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_mdss.h | 2 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 27 +- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 13 +- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 298 ++++++++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 14 +- 13 files changed, 753 insertions(+), 328 deletions(-) --- base-commit: 866e43b945bf98f8e807dfa45eca92f931f3a032 change-id: 20240618-concurrent-wb-97d62387f952 prerequisite-change-id: 20241222-drm-dirty-modeset-88079bd27ae6:v2 prerequisite-patch-id: 0c61aabfcd13651203f476985380cbf4d3c299e6 prerequisite-patch-id: c6026f08011c288fd301676e9fa6f46d0cc1dab7 prerequisite-patch-id: b0cb06d5c88791d6e4755d879ced0d5050aa3cbf prerequisite-patch-id: fd72ddde9dba0df053113bc505c213961a9760da prerequisite-change-id: 20250209-dpu-c3fac78fc617:v2 prerequisite-patch-id: c84d2b4b06be06384968429085d1e8ebae23a583 prerequisite-patch-id: fb8ea7b9e7c85fabd27589c6551108382a235002 prerequisite-change-id: 20250211-dither-disable-b77b1e31977f:v1 prerequisite-patch-id: 079e04296212b4b83d51394b5a9b5eea6870d98a Best regards,