Message ID | 20250227-topic-sm8x50-mdss-interconnect-bindings-fix-v5-0-bf6233c6ebe5@linaro.org |
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Thu, 27 Feb 2025 01:00:36 -0800 (PST) From: Neil Armstrong <neil.armstrong@linaro.org> Subject: [PATCH v5 0/2] dt-bindings: display: qcom,sm8[56]50-mdss: properly document the interconnect paths Date: Thu, 27 Feb 2025 10:00:31 +0100 Message-Id: <20250227-topic-sm8x50-mdss-interconnect-bindings-fix-v5-0-bf6233c6ebe5@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAK8pwGcC/6WSQW7DIBBFr2Kx7kSAje1EVdV7VF0AMyRINaRAr FRR7l7ibBJllXb5R+L9Lz1OLFPylNmmObFEs88+hhrUS8PsToctgceameRScckHKHHvLeRpPCo OE+YMPhRKNoZAtoDxAX3YZnD+CIjrQTkpW+SKVeI+UT0vbR+fNe98LjH9LOWzuFz/1jML4DAqa QT2mqjr37980CmuYtqyS9Es/wGXFe4GIc2Irq/PH+DtDVzw5+BthavOrnu9RmkG9wDvbuHtc/C uwlunubGdRGzHO/j5KiTR96FaL1crzOhMYOM0+bJp5n4lOkhWXORNlLNe/sOmeV32CKHu9xz2u STSE2ABb23NqAtd9ZDWoxGcpHbDzY63OuT8C1UUKraGAgAA X-Change-ID: 20250207-topic-sm8x50-mdss-interconnect-bindings-fix-dd975f223d05 To: Bjorn Andersson <andersson@kernel.org>, Konrad Dybcio <konradybcio@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org>, Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Cc: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Neil Armstrong <neil.armstrong@linaro.org> X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; 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dt-bindings: display: qcom,sm8[56]50-mdss: properly document the interconnect paths
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The mdp1-mem is not supported on the SM8550 & SM8650 SoCs, so properly document the mdp0-mem and cpu-cfg interconnect entries. This fixes the following errors: display-subsystem@ae00000: interconnects: [[200, 3, 7, 32, 1, 7]] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# display-subsystem@ae00000: interconnect-names: ['mdp0-mem'] is too short from schema $id: http://devicetree.org/schemas/display/msm/qcom,sm8650-mdss.yaml# Depends on: - https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/#t Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> --- Changes in v5: - Drop applied bindings patches - Updated commit msg with Dmitry's suggestion - Link to v4: https://lore.kernel.org/r/20250213-topic-sm8x50-mdss-interconnect-bindings-fix-v4-0-3fa0bc42dd38@linaro.org Changes in v4: - Add review tags - Rebased on top of https://lore.kernel.org/all/20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org/#t - Use ICC tags - Link to v3: https://lore.kernel.org/r/20250210-topic-sm8x50-mdss-interconnect-bindings-fix-v3-0-54c96a9d2b7f@linaro.org Changes in v3: - make sure we use cpu-cfg instead - Link to v2: https://lore.kernel.org/r/20250207-topic-sm8x50-mdss-interconnect-bindings-fix-v2-0-f712b8df6020@linaro.org Changes in v2: - fixed example in qcom,sm8550-mdss.yaml - Link to v1: https://lore.kernel.org/r/20250207-topic-sm8x50-mdss-interconnect-bindings-fix-v1-0-852b1d6aee46@linaro.org --- Neil Armstrong (2): arm64: dts: qcom: sm8550: add missing cpu-cfg interconnect path in the mdss node arm64: dts: qcom: sm8650: add missing cpu-cfg interconnect path in the mdss node arch/arm64/boot/dts/qcom/sm8550.dtsi | 6 ++++-- arch/arm64/boot/dts/qcom/sm8650.dtsi | 7 +++++-- 2 files changed, 9 insertions(+), 4 deletions(-) --- base-commit: 379487e17ca406b47392e7ab6cf35d1c3bacb371 change-id: 20250207-topic-sm8x50-mdss-interconnect-bindings-fix-dd975f223d05 prerequisite-message-id: <20250115-topic-sm8x50-upstream-dt-icc-update-v1-0-eaa8b10e2af7@linaro.org> prerequisite-patch-id: b2052194cecb6796ba6f1e58e0aaa9a7267f3d0b prerequisite-patch-id: a3def6c1e27e43153ae1f63343a092021926af8f prerequisite-patch-id: 7daf103007dc6f7ed97ce26c67799766197e0cfd prerequisite-patch-id: 68b4f5c2bce33ce6034716cfe4f7b9e2cd2d0f98 prerequisite-patch-id: 8b4cfaa99eb145b533a6ca63f4813e38649d6c8f prerequisite-patch-id: a0d5112490c42e1c7752371d6b3818fda5c06bbf prerequisite-patch-id: 7b72193dd00f7a2e8fef3f36e6e53fab4691a65b prerequisite-patch-id: 8e3be7c0aae177f77e42570c28a1ad22aef25768 prerequisite-patch-id: 8a641540de8fd86787102b3e682fa8baca295d66 prerequisite-patch-id: 8b31e6775ccb7811557ece74172dda96f368f0c5 Best regards,