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[v2,00/17] Arm cpu schema clean-ups

Message ID 20250410-dt-cpu-schema-v2-0-63d7dc9ddd0a@kernel.org
Headers show
Series Arm cpu schema clean-ups | expand

Message

Rob Herring April 10, 2025, 3:47 p.m. UTC 
The Arm cpu.yaml schema fails to restrict allowed properties in 'cpu' 
nodes. The result, not surprisely, is a number of additional properties 
and errors in .dts files. This series resolves those issues.

There's still more properties in arm32 DTS files which I have not 
documented. Mostly yet more supply names and "fsl,soc-operating-points". 
What's a few more warnings on the 10000s of warnings...

The .dts files can be taken by the respective SoC maintainers. I will 
take the binding changes.

---
v2:
 - Drop applied "arm64: dts: morello: Fix-up cache nodes"
 - Rework enable-method schema
 - Drop "arm: dts: qcom: msm8916: Move "qcom,acc" and "qcom,saw" to 32-bit .dtsi"
 - Keep qcom,saw and qcom,acc properties on msm8939
 - Fix qcom,saw2.yaml example
 - Fix power-domain-names to be "perf" on qcom sdx55/65

Link to v1: 
https://lore.kernel.org/all/20250403-dt-cpu-schema-v1-0-076be7171a85@kernel.org/

Signed-off-by: "Rob Herring (Arm)" <robh@kernel.org>
To: Krzysztof Kozlowski <krzk+dt@kernel.org>
To: Conor Dooley <conor+dt@kernel.org>
To: Chen-Yu Tsai <wens@csie.org>
To: Jernej Skrabec <jernej.skrabec@gmail.com>
To: Samuel Holland <samuel@sholland.org>
To: Conor Dooley <conor@kernel.org>
To: Nicolas Ferre <nicolas.ferre@microchip.com>
To: Claudiu Beznea <claudiu.beznea@tuxon.dev>
To: Steen Hegelund <Steen.Hegelund@microchip.com>
To: Daniel Machon <daniel.machon@microchip.com>
To: UNGLinuxDriver@microchip.com
To: Bjorn Andersson <andersson@kernel.org>
To: Konrad Dybcio <konradybcio@kernel.org>
To: Shawn Guo <shawnguo@kernel.org>
To: Sascha Hauer <s.hauer@pengutronix.de>
To: Pengutronix Kernel Team <kernel@pengutronix.de>
To: Fabio Estevam <festevam@gmail.com>
To: Heiko Stuebner <heiko@sntech.de>
To: Neil Armstrong <neil.armstrong@linaro.org>
To: Kevin Hilman <khilman@baylibre.com>
To: Jerome Brunet <jbrunet@baylibre.com>
To: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
To: Geert Uytterhoeven <geert+renesas@glider.be>
To: Magnus Damm <magnus.damm@gmail.com>
To: Lorenzo Pieralisi <lpieralisi@kernel.org>
To: Andy Gross <agross@kernel.org>
To: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
To: Viresh Kumar <vireshk@kernel.org>
To: Nishanth Menon <nm@ti.com>
To: Stephen Boyd <sboyd@kernel.org>
To: zhouyanjie@wanyeetech.com
To: Matthias Brugger <matthias.bgg@gmail.com>
To: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
To: "Rafael J. Wysocki" <rafael@kernel.org>
To: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> 
To: Stephan Gerhold <stephan.gerhold@linaro.org> 
Cc: devicetree@vger.kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-sunxi@lists.linux.dev
Cc: linux-kernel@vger.kernel.org
Cc: linux-arm-msm@vger.kernel.org
Cc: imx@lists.linux.dev
Cc: linux-rockchip@lists.infradead.org
Cc: linux-amlogic@lists.infradead.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-mips@vger.kernel.org
Cc: linux-pm@vger.kernel.org
Cc: linux-mediatek@lists.infradead.org

---
Rob Herring (Arm) (17):
      arm64: dts: allwinner: h5/h6: Drop spurious 'clock-latency-ns' properties
      arm64: dts: broadcom: bcm2712: Use "l2-cache" for L2 cache node names
      arm64: dts: microchip: sparx5: Fix CPU node "enable-method" property dependencies
      arm64: dts: qcom: qdu1000: Fix qcom,freq-domain
      arm64: dts: qcom: msm8939: Fix CPU node "enable-method" property dependencies
      arm64: dts: qcom: msm8992-lg-h815: Fix CPU node "enable-method" property dependencies
      arm: dts: qcom: sdx55/sdx65: Fix CPU power-domain-names
      arm/arm64: dts: imx: Drop redundant CPU "clock-latency"
      arm: dts: qcom: ipq4019: Drop redundant CPU "clock-latency"
      arm: dts: rockchip: Drop redundant CPU "clock-latency"
      arm64: dts: amlogic: Drop redundant CPU "clock-latency"
      dt-bindings: arm/cpus: Add schemas for "enable-method" dependencies
      dt-bindings: arm/cpus: Re-wrap 'description' entries
      dt-bindings: Reference opp-v1 schema in CPU schemas
      dt-bindings: arm/cpus: Add missing properties
      dt-bindings: arm/cpus: Add power-domains constraints
      dt-bindings: cpufreq: Drop redundant Mediatek binding

 Documentation/devicetree/bindings/arm/cpus.yaml    | 229 +++++++++++--------
 .../bindings/cpufreq/cpufreq-mediatek.txt          | 250 ---------------------
 Documentation/devicetree/bindings/mips/cpus.yaml   |   3 +-
 Documentation/devicetree/bindings/opp/opp-v1.yaml  |  18 +-
 .../devicetree/bindings/soc/qcom/qcom,saw2.yaml    |   3 +-
 arch/arm/boot/dts/nxp/imx/imx7s.dtsi               |   1 -
 arch/arm/boot/dts/qcom/qcom-ipq4019.dtsi           |   4 -
 arch/arm/boot/dts/qcom/qcom-sdx55.dtsi             |   2 +-
 arch/arm/boot/dts/qcom/qcom-sdx65.dtsi             |   2 +-
 arch/arm/boot/dts/rockchip/rk3128.dtsi             |   8 +-
 arch/arm/boot/dts/rockchip/rk3188.dtsi             |   1 -
 arch/arm/boot/dts/rockchip/rk322x.dtsi             |   1 -
 arch/arm/boot/dts/rockchip/rk3288.dtsi             |   5 +-
 arch/arm/boot/dts/rockchip/rv1108.dtsi             |   1 -
 arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi       |   4 -
 arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi       |   4 -
 arch/arm64/boot/dts/amlogic/meson-g12a-fbx8am.dts  |   4 -
 .../boot/dts/amlogic/meson-g12a-radxa-zero.dts     |   4 -
 arch/arm64/boot/dts/amlogic/meson-g12a-sei510.dts  |   4 -
 arch/arm64/boot/dts/amlogic/meson-g12a-u200.dts    |   4 -
 arch/arm64/boot/dts/amlogic/meson-g12a-x96-max.dts |   4 -
 arch/arm64/boot/dts/amlogic/meson-g12a.dtsi        |   1 +
 .../dts/amlogic/meson-g12b-a311d-libretech-cc.dts  |   6 -
 arch/arm64/boot/dts/amlogic/meson-g12b-a311d.dtsi  |   2 +
 .../boot/dts/amlogic/meson-g12b-bananapi-cm4.dtsi  |   6 -
 .../boot/dts/amlogic/meson-g12b-bananapi.dtsi      |   6 -
 .../boot/dts/amlogic/meson-g12b-khadas-vim3.dtsi   |   6 -
 .../dts/amlogic/meson-g12b-odroid-go-ultra.dts     |   6 -
 arch/arm64/boot/dts/amlogic/meson-g12b-odroid.dtsi |   6 -
 .../boot/dts/amlogic/meson-g12b-radxa-zero2.dts    |   6 -
 arch/arm64/boot/dts/amlogic/meson-g12b-s922x.dtsi  |   2 +
 arch/arm64/boot/dts/amlogic/meson-g12b-w400.dtsi   |   6 -
 arch/arm64/boot/dts/amlogic/meson-sm1-ac2xx.dtsi   |   4 -
 .../arm64/boot/dts/amlogic/meson-sm1-bananapi.dtsi |   4 -
 .../boot/dts/amlogic/meson-sm1-khadas-vim3l.dts    |   4 -
 arch/arm64/boot/dts/amlogic/meson-sm1-odroid.dtsi  |   4 -
 .../dts/amlogic/meson-sm1-s905d3-libretech-cc.dts  |   4 -
 arch/arm64/boot/dts/amlogic/meson-sm1-sei610.dts   |   4 -
 arch/arm64/boot/dts/amlogic/meson-sm1.dtsi         |   1 +
 arch/arm64/boot/dts/broadcom/bcm2712.dtsi          |   8 +-
 arch/arm64/boot/dts/freescale/imx8mm.dtsi          |   4 -
 arch/arm64/boot/dts/freescale/imx8mn.dtsi          |   4 -
 arch/arm64/boot/dts/freescale/imx8mp.dtsi          |   4 -
 arch/arm64/boot/dts/freescale/imx8mq.dtsi          |   4 -
 .../boot/dts/microchip/sparx5_pcb_common.dtsi      |   2 +
 arch/arm64/boot/dts/qcom/msm8939.dtsi              |   8 +
 arch/arm64/boot/dts/qcom/msm8992-lg-h815.dts       |   6 +
 arch/arm64/boot/dts/qcom/qdu1000.dtsi              |   8 +-
 48 files changed, 202 insertions(+), 480 deletions(-)
---
base-commit: 0af2f6be1b4281385b618cb86ad946eded089ac8
change-id: 20250403-dt-cpu-schema-48e66c7f6a90

Best regards,

Comments

Conor Dooley April 11, 2025, 4:21 p.m. UTC | #1 
On Thu, Apr 10, 2025 at 10:47:24AM -0500, Rob Herring (Arm) wrote:
> The "spin-table" enable-method requires "cpu-release-addr" property,
> so add a dummy entry. It is assumed the bootloader will fill in the
> correct values.
> 
> Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
> Tested-by: Daniel Machon <daniel.machon@microchip.com>

This is already applied, guess I forgot to merge it into the branch that
appears in linux next. I'll do that now..
Conor Dooley April 14, 2025, 5:02 p.m. UTC | #2 
On Fri, Apr 11, 2025 at 03:26:50PM -0500, Rob Herring wrote:
> On Fri, Apr 11, 2025 at 11:22 AM Conor Dooley <conor@kernel.org> wrote:
> >
> > On Thu, Apr 10, 2025 at 10:47:24AM -0500, Rob Herring (Arm) wrote:
> > > The "spin-table" enable-method requires "cpu-release-addr" property,
> > > so add a dummy entry. It is assumed the bootloader will fill in the
> > > correct values.
> > >
> > > Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
> > > Reviewed-by: Daniel Machon <daniel.machon@microchip.com>
> > > Tested-by: Daniel Machon <daniel.machon@microchip.com>
> >
> > This is already applied, guess I forgot to merge it into the branch that
> > appears in linux next. I'll do that now..
> 
> Sometimes I check next, but in this case I just looked at replies for
> which there were none. I dislike submitting dts changes because it's a
> range of AWOL maintainers, only applying around some rcN (so up to 2
> months later), silently applying, and applied but never in linux-next
> (until in soc tree).

Let's add "send the b4 ty email" to the list of things that I did not
do, but thought that I had done.