Message ID | 20250425-b4-media-committers-25-04-25-camss-supplies-v1-0-2a3dd3a47a6a@linaro.org |
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[188.141.3.146]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-440a530f6e6sm22648985e9.17.2025.04.25.05.01.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 25 Apr 2025 05:01:54 -0700 (PDT) From: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Subject: [PATCH 0/2] media: qcom: camss: x1e80100: Add support for individual CSIPHY supplies Date: Fri, 25 Apr 2025 13:01:50 +0100 Message-Id: <20250425-b4-media-committers-25-04-25-camss-supplies-v1-0-2a3dd3a47a6a@linaro.org> Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: <linux-arm-msm.vger.kernel.org> List-Subscribe: <mailto:linux-arm-msm+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:linux-arm-msm+unsubscribe@vger.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIAK55C2gC/x2N0QrCMAxFf2Xk2UAM7RB/RXyobdSA3UqziTD27 0ZfLpz7cM4GJl3F4Dxs0OWtpvPkcDwMkJ9peghqcQYmjhQ44i1glaIJ81yrLot0Q78p/Danaoa 2tvZyKY58ijkSjSUxuLF1uevnX7tc9/0LHnI1dn0AAAA= X-Change-ID: 20250425-b4-media-committers-25-04-25-camss-supplies-6285c5006da2 To: Robert Foss <rfoss@kernel.org>, Todor Tomov <todor.too@gmail.com>, Mauro Carvalho Chehab <mchehab@kernel.org>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> Cc: dmitry.baryshkov@oss.qualcomm.com, loic.poulain@oss.qualcomm.com, vladimir.zapolskiy@linaro.org, krzk@kernel.org, linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Bryan O'Donoghue <bryan.odonoghue@linaro.org> X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=openpgp-sha256; l=2818; i=bryan.odonoghue@linaro.org; h=from:subject:message-id; bh=I8dMULvxGao4uog4WiVhasxHmTD8b+lWbSR7wxgq760=; b=owEBbQKS/ZANAwAIASJxO7Ohjcg6AcsmYgBoC3mw7a3liQZrYdbYhVQnEfJyWQvO6lZ3x8vob lV9SqqrDGCJAjMEAAEIAB0WIQTmk/sqq6Nt4Rerb7QicTuzoY3IOgUCaAt5sAAKCRAicTuzoY3I OiDPD/sEWHdrQDQ5N3v5KwNw5S9Y/WHd7jlrNsvhRUHLBubk5rCClsaT+jaVJa9ZxaUOhDQU9Nj +6ytuUwz8X6ueBnn/WYiyKr+cfDUUenW1mrG30xOmpqRlA6omYyFVRZm3BpFDEHU+hCQahFyiCq yGJKC/MZqt3R6BGfz+UkV1NUi2g5w1UhQbz2WVM/tDMOzdpPEYhlZM9ivly0XOWAExB3d97B7Hw /DSyxWSsFy7XqpZxYh4HAC80HBCbIuNHAA2bjMQQyrscYxB8ruzHR3xgGDnyJf0s7/wFs7PnrMp tJL8t1VJgTO5N+PKjePR1rwgtsZ+TuanPEubSMghtzknpgNDZdxAOGZnAp4m4eUwyuEZoVKgGCT 4H6OUSILLIDsUb7lbXnouWJcgVEbPH4cpDTQUf2hWn1Act4FS5oxhQQuqE3AMTGoWFJcfdnDfKy 24GYV4ndy4Wx6q/EyRypaBi4K/7+vAcIgFcA1FQJuVNJgCf+XeY7OIGTJIxu360fcS7sY07hDLJ kG57quq1Xp5GdN49uuyG1GisHpmMwx+M3vjO2XRErKBHxCG4HMsBBOqtcttJV/lxCmgn7MfeLP8 6yH0870NAJOmWNhNV9O8DG2xsQIqTHZxXVKSn9sFciYDOqWHvo1A27okFdgqdsHvTmBlsczjf5Z kUA98hAsw/SQc3A== X-Developer-Key: i=bryan.odonoghue@linaro.org; a=openpgp; fpr=E693FB2AABA36DE117AB6FB422713BB3A18DC83A |
Series |
media: qcom: camss: x1e80100: Add support for individual CSIPHY supplies
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In x1e each CSIPHY has its own 0p8 and 1p2 voltage rail. These voltage rails in previous SoCs were shared between PHYs, over time the hardware differentiated out the rails per PHY but CAMSS didn't keep-up with or know about that change. We have two options to support individual rails per PHY. - Logical naming of the supply lines In this case supply names describe the PHY and its expected voltage input For example vdd-csiphy0-0p8-supply for the 0v8 voltage rail to CSIPHY 0. - Pin naming of the supply lines In this case supply names will align to the name of the SoC pin. For example on x1e the supply name would be vdd vdd-a-csi-0-1-1p2. This series chooses the first approach for the following reasons: - Naming coherency across SoCs and PCBs. Virtually every CSIPHY has 0p8 and 1p2 voltage rails and these are akin to an architectural feature of these PHYs or at the very least a common pattern across SoCs. This means that the pin name on x1e might be VDD_A_CSI_0_1_1P2 and on qcm2290 VDD_A_CSI_0_1P2 but the yaml standard will be for the regulator name to be vdd-csiphy0-1p2-supply. - Accounting for upstreamers who don't have schematic or qcom IP access Not everybody making upstream submissions has access to schematics or to Qualcomm's SoC-level pin definitions instead working from vendor/downstream DT information. It should still be possible to construct a valid upstream definition from that downstream DT. - The counter arugment. The counter argument is that aligning the pin-names to the regulator names is less error prone and I agree with that statement. What I'd say here is - the requirement for CAMSS regulator defintions in DT at least from my perspective is a putative upstreamer should be able to show how they have tested a given DT submission. If that submission isn't tested, it isn't working and should be rejected. That should then address the concern of having as another example: vdd-csiphy0-0p8-supply = <&vreg_oops_wrong_regulator>; I'm promulgating this series in the context of x1e but it should also unblock qcm2290 and sm8650. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- Bryan O'Donoghue (2): dt-bindings: media: qcom,x1e80100-camss: Fixup csiphy supply names media: qcom: camss: x1e80100: Fixup x1e csiphy supply names .../bindings/media/qcom,x1e80100-camss.yaml | 52 +++++++++++++++++----- drivers/media/platform/qcom/camss/camss.c | 16 +++---- 2 files changed, 48 insertions(+), 20 deletions(-) --- base-commit: 1d1e564fce1bc361af1a1980a7f915a0475a008a change-id: 20250425-b4-media-committers-25-04-25-camss-supplies-6285c5006da2 Best regards,