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Mon, 04 Nov 2024 16:20:58 +0000 Received: from NALASPPMTA04.qualcomm.com (NALASPPMTA04.qualcomm.com [127.0.0.1]) by pps.reinject (8.17.1.5/8.17.1.5) with ESMTP id 4A4GKwng011000; Mon, 4 Nov 2024 16:20:58 GMT Received: from hu-devc-lv-u22-c.qualcomm.com (hu-uchalich-lv.qualcomm.com [10.81.89.1]) by NALASPPMTA04.qualcomm.com (PPS) with ESMTPS id 4A4GKwKV010999 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Mon, 04 Nov 2024 16:20:58 +0000 Received: by hu-devc-lv-u22-c.qualcomm.com (Postfix, from userid 4184210) id E6998641; Mon, 4 Nov 2024 08:20:57 -0800 (PST) From: Unnathi Chalicheemala To: Bjorn Andersson , Konrad Dybcio Cc: Unnathi Chalicheemala , linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, kernel@quicinc.com Subject: [PATCH v3 0/2] SCM: Support latest version of waitq-aware firmware Date: Mon, 4 Nov 2024 08:20:54 -0800 Message-Id: X-Mailer: git-send-email 2.34.1 Precedence: bulk X-Mailing-List: linux-arm-msm@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-QCInternal: smtphost X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-ORIG-GUID: PaGmidreEpcr-rov4bYZa3jOQAMezb5Z X-Proofpoint-GUID: PaGmidreEpcr-rov4bYZa3jOQAMezb5Z X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1039,Hydra:6.0.680,FMLib:17.12.60.29 definitions=2024-09-06_09,2024-09-06_01,2024-09-02_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 lowpriorityscore=0 mlxlogscore=999 clxscore=1011 suspectscore=0 adultscore=0 priorityscore=1501 bulkscore=0 mlxscore=0 malwarescore=0 spamscore=0 impostorscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2409260000 definitions=main-2411040138 This series adds support for the latest improvements made in SCM firmware that allow for multiple wait-queues in firmware. To support multi VM synchronization when VMs make SMC calls on same CPU, waitqueue mechanism is added in firmware which runs at EL2 & EL3 exception levels. P.S. While at Qualcomm, Guru Das Srinagesh authored the initial version of these patches. Thanks Guru! --- Changes in v3: - Use GIC_SPI and GIC_ESPI macros from dt-bindings instead of redefining - Prettified qcom_scm_fill_irq_fwspec_params() - Moved waitq initialization before smp_store_release() - There is no Gunyah hypercall API that can be used to fetch IRQ information hence introducing new SCM call. - Link to v2: https://lore.kernel.org/all/cover.1724968351.git.quic_uchalich@quicinc.com/ Changes in v2: - Dropped "Initialize waitq before setting global __scm" as it was merged here: https://lore.kernel.org/r/1711034642-22860-4-git-send-email-quic_mojha@quicinc.com - Decoupled "Remove QCOM_SMC_WAITQ_FLAG_WAKE_ALL" from series - Converted xarray to a statically sized array - Initialize waitq array in probe function - Remove reinit of waitq completion struct in scm_get_completion() - Introduced new APIs to get no. of waitqueue contexts and waitqueue IRQ no. directly from firmware. - Link to v1: https://lore.kernel.org/all/20240228-multi_waitq-v1-0-ccb096419af0@quicinc.com/ Unnathi Chalicheemala (2): firmware: qcom_scm: Add API to get waitqueue IRQ info firmware: qcom_scm: Support multiple waitq contexts drivers/firmware/qcom/qcom_scm.c | 119 ++++++++++++++++++++++++++----- drivers/firmware/qcom/qcom_scm.h | 1 + 2 files changed, 101 insertions(+), 19 deletions(-)