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drm/msm/dpu: Support quad pipe with dual-DSI
| Archived =
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| 7 patches
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andy.doan@linaro.org
andy.doan@linaro.org
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[v3,14/15] drm/msm/dpu: support SSPP assignment for quad-pipe case
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,12/15] drm/msm/dpu: support plane splitting in quad-pipe case
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,10/15] drm/msm/dpu: Add pipe as trace argument
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,08/15] drm/msm/dpu: handle pipes as array
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,06/15] drm/msm/dpu: switch RM to use crtc_id rather than enc_id for allocation
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,04/15] drm/msm/dpu: decide right side per last bit
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New
[v3,02/15] drm/msm/dpu: configure DSC per number in use
drm/msm/dpu: Support quad pipe with dual-DSI
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-
-
2024-12-19
Jun Nie
New