Message ID | 1-v2-68a2e1ba507c+1fb-iommu_rm_ops_pgsize_jgg@nvidia.com |
---|---|
State | New |
Headers | show |
Series | Remove ops.pgsize_bitmap | expand |
On Mon, Jun 09, 2025 at 05:41:25PM -0300, Jason Gunthorpe wrote: > The driver never reads this value, arm_smmu_domain_finalise() always sets > domain.pgsize_bitmap to pgtbl_cfg, which comes from the per-smmu > calculated value. > > Remove the ops version entirely, the related dead code and make > arm_smmu_ops const. > > Reviewed-by: Kevin Tian <kevin.tian@intel.com> > Acked-by: Will Deacon <will@kernel.org> > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> Is "qiommu" a typo in the subject?
On Mon, Jun 09, 2025 at 03:15:47PM -0700, Nicolin Chen wrote: > On Mon, Jun 09, 2025 at 05:41:25PM -0300, Jason Gunthorpe wrote: > > The driver never reads this value, arm_smmu_domain_finalise() always sets > > domain.pgsize_bitmap to pgtbl_cfg, which comes from the per-smmu > > calculated value. > > > > Remove the ops version entirely, the related dead code and make > > arm_smmu_ops const. > > > > Reviewed-by: Kevin Tian <kevin.tian@intel.com> > > Acked-by: Will Deacon <will@kernel.org> > > Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> > > Reviewed-by: Nicolin Chen <nicolinc@nvidia.com> > > Is "qiommu" a typo in the subject? Yeah Thanks, Jason
diff --git a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c index 10cc6dc26b7b7c..351fe2516b694e 100644 --- a/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c +++ b/drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c @@ -38,7 +38,7 @@ module_param(disable_msipolling, bool, 0444); MODULE_PARM_DESC(disable_msipolling, "Disable MSI-based polling for CMD_SYNC completion."); -static struct iommu_ops arm_smmu_ops; +static const struct iommu_ops arm_smmu_ops; static struct iommu_dirty_ops arm_smmu_dirty_ops; enum arm_smmu_msi_index { @@ -3674,7 +3674,7 @@ static int arm_smmu_def_domain_type(struct device *dev) return 0; } -static struct iommu_ops arm_smmu_ops = { +static const struct iommu_ops arm_smmu_ops = { .identity_domain = &arm_smmu_identity_domain, .blocked_domain = &arm_smmu_blocked_domain, .capable = arm_smmu_capable, @@ -3690,7 +3690,6 @@ static struct iommu_ops arm_smmu_ops = { .def_domain_type = arm_smmu_def_domain_type, .viommu_alloc = arm_vsmmu_alloc, .user_pasid_table = 1, - .pgsize_bitmap = -1UL, /* Restricted during device attach */ .owner = THIS_MODULE, .default_domain_ops = &(const struct iommu_domain_ops) { .attach_dev = arm_smmu_attach_dev, @@ -4504,11 +4503,6 @@ static int arm_smmu_device_hw_probe(struct arm_smmu_device *smmu) smmu->oas = 48; } - if (arm_smmu_ops.pgsize_bitmap == -1UL) - arm_smmu_ops.pgsize_bitmap = smmu->pgsize_bitmap; - else - arm_smmu_ops.pgsize_bitmap |= smmu->pgsize_bitmap; - /* Set the DMA mask for our table walker */ if (dma_set_mask_and_coherent(smmu->dev, DMA_BIT_MASK(smmu->oas))) dev_warn(smmu->dev,