From patchwork Tue Jan 31 07:58:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andy Gross X-Patchwork-Id: 92945 Delivered-To: patch@linaro.org Received: by 10.140.20.99 with SMTP id 90csp1812075qgi; Mon, 30 Jan 2017 23:59:16 -0800 (PST) X-Received: by 10.99.170.5 with SMTP id e5mr29267937pgf.89.1485849556859; Mon, 30 Jan 2017 23:59:16 -0800 (PST) Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p5si10598442pgk.146.2017.01.30.23.59.16; Mon, 30 Jan 2017 23:59:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750978AbdAaH7H (ORCPT + 9 others); Tue, 31 Jan 2017 02:59:07 -0500 Received: from mail-pf0-f169.google.com ([209.85.192.169]:35905 "EHLO mail-pf0-f169.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751037AbdAaH6x (ORCPT ); Tue, 31 Jan 2017 02:58:53 -0500 Received: by mail-pf0-f169.google.com with SMTP id 189so102146683pfu.3 for ; Mon, 30 Jan 2017 23:58:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=G9NBts41uwffg1UmEZuPpHtOZ+fv6Gl3rR9pYE03wPo=; b=OxA5rT+AgF1nLJ9qPO2BDIt5raEuipQExBzU7uVpajK+uCgSaL+vNecuwH38z0Zned Nxi9HsYWcUnF+TQPFdwAQ0ei9usl1bng677IXzHtSW94osuENJ4orpOai1SsLg4aNnkZ 9p0MgNsXaCmautNqQZCZ7vw8kHlDJcZWGwrpE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=G9NBts41uwffg1UmEZuPpHtOZ+fv6Gl3rR9pYE03wPo=; b=a+LqW/Ph9jEH7f5bvAnLH85P1Gf2BCi3oLvlk0uysgP67Js8uRov3aB0Eg0VoZuyhu 46YZhoOomVMrEbuRcoKqaR6EqJ/kTA0F0fi+4TNzFu+2x6Xkg5OXJg3F6up4goUcVxoz ApO1LdZRoQENLPgKKDHxgJbGYU6Cc+M6maNek6mUu9O/vRyaXlzaBRGY10Qb1fmUGD2Q DDXXTEevkyJ1JXS8MpxJX1zTNWGAG/EWBHeAwLawq/IL5pY2DWQ5TNTTMulWp2wtutvD ixZa2sxBrs6B9nu4XCCco9W6mzqB9CfHcEshSS3KzwHaYUV0TQD3lJWiB1VKQambqaLq o58w== X-Gm-Message-State: AIkVDXK2uh2argyMK3MVAkV0VbYysGHyFPtJtQzgq30mPl/S63nX5UjgJVAw4m6YaUrRXLhv X-Received: by 10.98.19.145 with SMTP id 17mr27699403pft.26.1485849532240; Mon, 30 Jan 2017 23:58:52 -0800 (PST) Received: from localhost ([2602:306:3406:6500:9818:4608:a55b:37e]) by smtp.gmail.com with ESMTPSA id p15sm38169694pfk.58.2017.01.30.23.58.50 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Mon, 30 Jan 2017 23:58:51 -0800 (PST) From: Andy Gross To: linux-arm-kernel@lists.infradead.org Cc: lorenzo.pieralisi@arm.com, linux-arm-msm@vger.kernel.org, will.deacon@arm.com, linux-kernel@vger.kernel.org, Bjorn Andersson , Kevin Hilman , linux@armlinux.org.uk, ynorov@caviumnetworks.com, james.morse@arm.com, Olof Johansson , Andy Gross Subject: [Patch v5 2/2] firmware: qcom: scm: Fix interrupted SCM calls Date: Tue, 31 Jan 2017 01:58:42 -0600 Message-Id: <1485849522-12806-3-git-send-email-andy.gross@linaro.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1485849522-12806-1-git-send-email-andy.gross@linaro.org> References: <1485849522-12806-1-git-send-email-andy.gross@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds a Qualcomm specific quirk to the arm_smccc_smc call. On Qualcomm ARM64 platforms, the SMC call can return before it has completed. If this occurs, the call can be restarted, but it requires using the returned session ID value from the interrupted SMC call. The quirk stores off the session ID from the interrupted call in the quirk structure so that it can be used by the caller. This patch folds in a fix given by Sricharan R: https://lkml.org/lkml/2016/9/28/272 This patch also folds in a fix for the hvc call, provided by James Morse and Yuri Norov. Signed-off-by: Andy Gross Reviewed-by: Will Deacon --- arch/arm64/kernel/smccc-call.S | 15 ++++++++++++--- drivers/firmware/qcom_scm-64.c | 13 ++++++++++--- include/linux/arm-smccc.h | 11 ++++++++--- 3 files changed, 30 insertions(+), 9 deletions(-) -- 1.9.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/kernel/smccc-call.S b/arch/arm64/kernel/smccc-call.S index 6290696..ac33dc2 100644 --- a/arch/arm64/kernel/smccc-call.S +++ b/arch/arm64/kernel/smccc-call.S @@ -12,15 +12,24 @@ * */ #include +#include #include - .macro SMCCC instr + .macro SMCCC instr, maybe_quirk = 0 .cfi_startproc \instr #0 ldr x4, [sp] stp x0, x1, [x4, #ARM_SMCCC_RES_X0_OFFS] stp x2, x3, [x4, #ARM_SMCCC_RES_X2_OFFS] - ret + .if \maybe_quirk != 0 + ldr x4, [sp, #8] + cbz x4, 1f /* no quirk structure */ + ldr x9, [x4, #ARM_SMCCC_QUIRK_ID_OFFS] + cmp x9, #ARM_SMCCC_QUIRK_QCOM_A6 + b.ne 1f + str x6, [x4, ARM_SMCCC_QUIRK_STATE_OFFS] + .endif +1: ret .cfi_endproc .endm @@ -31,7 +40,7 @@ * struct arm_smccc_quirk *quirk) */ ENTRY(__arm_smccc_smc) - SMCCC smc + SMCCC smc, 1 ENDPROC(__arm_smccc_smc) /* diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c index 4a0f5ea..1e2e519 100644 --- a/drivers/firmware/qcom_scm-64.c +++ b/drivers/firmware/qcom_scm-64.c @@ -91,6 +91,7 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, dma_addr_t args_phys = 0; void *args_virt = NULL; size_t alloc_len; + struct arm_smccc_quirk quirk = {.id = ARM_SMCCC_QUIRK_QCOM_A6}; if (unlikely(arglen > N_REGISTER_ARGS)) { alloc_len = N_EXT_QCOM_SCM_ARGS * sizeof(u64); @@ -131,10 +132,16 @@ static int qcom_scm_call(struct device *dev, u32 svc_id, u32 cmd_id, qcom_smccc_convention, ARM_SMCCC_OWNER_SIP, fn_id); + quirk.state.a6 = 0; + do { - arm_smccc_smc(cmd, desc->arginfo, desc->args[0], - desc->args[1], desc->args[2], x5, 0, 0, - res); + arm_smccc_smc_quirk(cmd, desc->arginfo, desc->args[0], + desc->args[1], desc->args[2], x5, + quirk.state.a6, 0, res, &quirk); + + if (res->a0 == QCOM_SCM_INTERRUPTED) + cmd = res->a0; + } while (res->a0 == QCOM_SCM_INTERRUPTED); mutex_unlock(&qcom_scm_lock); diff --git a/include/linux/arm-smccc.h b/include/linux/arm-smccc.h index ab937db..6cd101e 100644 --- a/include/linux/arm-smccc.h +++ b/include/linux/arm-smccc.h @@ -14,9 +14,6 @@ #ifndef __LINUX_ARM_SMCCC_H #define __LINUX_ARM_SMCCC_H -#include -#include - /* * This file provides common defines for ARM SMC Calling Convention as * specified in @@ -60,6 +57,13 @@ #define ARM_SMCCC_OWNER_TRUSTED_OS 50 #define ARM_SMCCC_OWNER_TRUSTED_OS_END 63 +#define ARM_SMCCC_QUIRK_NONE 0 +#define ARM_SMCCC_QUIRK_QCOM_A6 1 /* Save/restore register a6 */ + +#ifndef __ASSEMBLY__ + +#include +#include /** * struct arm_smccc_res - Result from SMC/HVC call * @a0-a3 result values from registers 0 to 3 @@ -120,4 +124,5 @@ asmlinkage void arm_smccc_hvc(unsigned long a0, unsigned long a1, #define arm_smccc_smc_quirk(...) __arm_smccc_smc(__VA_ARGS__) +#endif /*__ASSEMBLY__*/ #endif /*__LINUX_ARM_SMCCC_H*/