From patchwork Fri Mar 6 17:19:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Loic Poulain X-Patchwork-Id: 190086 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.9 required=3.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5CD2BC10DCE for ; Fri, 6 Mar 2020 17:15:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 330F32084E for ; Fri, 6 Mar 2020 17:15:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="NfoMBlKb" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726178AbgCFRPq (ORCPT ); Fri, 6 Mar 2020 12:15:46 -0500 Received: from mail-wr1-f67.google.com ([209.85.221.67]:44374 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726090AbgCFRPq (ORCPT ); Fri, 6 Mar 2020 12:15:46 -0500 Received: by mail-wr1-f67.google.com with SMTP id n7so3234887wrt.11 for ; Fri, 06 Mar 2020 09:15:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=R7l2TY+FuhyDMd3P1F1YgdGbiLMlXGWtTzbc6N9h5M4=; b=NfoMBlKbLA4tdgTaHpNhhpAMMlFKSzQTvo0LPKbkc+1++IejKJl3OGCs9sB9MeRB4/ hmZykXkBoFZ/zni3qoGjPdfEMoEMpJ8uj3zG45Ny9Y1mVMCOyfhMnqAXCf3vkIZ77x5+ I3ohykkTe3R7QqTPMbF1u+72m5wcP6OY3eAb5cyEg62F2G6kayaDQO3Gdan3p2I9w3NA c6R1CTd1pBqQBRe3pflZketklAUtRbykzapLIabO0H2PSI40fEcJo27uqWpPpbCEALjD clT2+FoRLfl+LoTqKHRlT1UANp8t6MnsV27deMkbUvwUEtXjzpWihAL7fIPIRQAKIBVh WnpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=R7l2TY+FuhyDMd3P1F1YgdGbiLMlXGWtTzbc6N9h5M4=; b=HAx+AlRalXBYSN9VxaGmuT3tq9mcMaPWEvG96sRx+gFrB1l5LDNxpVT0KuinbRuGqu MwoKv/WB9WWkWq9TnZeTQWtPBiRgb0QaU9cMKP6UJBaRkFAHLgXE/GaipnOo+Ug3SyJf NRuMtJ8TZaLqaCJMqpb2pKjYNdeuZtvVRS9oMlAB+rOM3KoLQSQtxG6gtupQsTkbzNbi z5uPzCQ0EoSTLIPnMxMx5AOVU/+ejdvtjqsOlIE1xttEkLkg/tobD7j+gmmw20W47Xpw CxFCXxhYKD46gvRDPbcgj3hhHycKahwI4A0yoFhfLYbE3L2QIv3Ls3HGtO66VIUP/8Ev yM3g== X-Gm-Message-State: ANhLgQ1HAKHTzRKQ6wn/XTBRLeRDtv3MlX9tBEen/jfajM62nUt4JNDO MHyjfyjdz5/CsXGRnpnWlEX6WQ== X-Google-Smtp-Source: ADFU+vuFzNXF+G4xj7HZXx3BNKfdWUT0BTxFAseD8n6CuOQBS4IHKPrlyAWLAhaYcCuJ2+7LW33NgQ== X-Received: by 2002:adf:d4ce:: with SMTP id w14mr5117479wrk.101.1583514944433; Fri, 06 Mar 2020 09:15:44 -0800 (PST) Received: from localhost.localdomain ([172.111.156.149]) by smtp.gmail.com with ESMTPSA id c5sm545385wma.3.2020.03.06.09.15.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 06 Mar 2020 09:15:44 -0800 (PST) From: Loic Poulain To: wsa@the-dreams.de Cc: vkoul@kernel.org, robert.foss@linaro.org, bjorn.andersson@linaro.org, linux-i2c@vger.kernel.org, linux-arm-msm@vger.kernel.org, Todor Tomov Subject: [PATCH v4 2/3] dt-bindings: i2c: Add binding for Qualcomm CCI I2C controller Date: Fri, 6 Mar 2020 18:19:43 +0100 Message-Id: <1583515184-9636-2-git-send-email-loic.poulain@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1583515184-9636-1-git-send-email-loic.poulain@linaro.org> References: <1583515184-9636-1-git-send-email-loic.poulain@linaro.org> Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Todor Tomov Add DT binding document for Qualcomm Camera Control Interface (CCI) I2C controller. Signed-off-by: Todor Tomov Signed-off-by: Vinod Koul Reviewed-by: Rob Herring Reviewed-by: Robert Foss --- v2: Fix subnode properties, remove mandatory clock names v3: Add sdm845 compatible string v4: no change .../devicetree/bindings/i2c/i2c-qcom-cci.txt | 92 ++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt diff --git a/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt new file mode 100644 index 0000000..c6668b7 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/i2c-qcom-cci.txt @@ -0,0 +1,92 @@ +Qualcomm Camera Control Interface (CCI) I2C controller + +PROPERTIES: + +- compatible: + Usage: required + Value type: + Definition: must be one of: + "qcom,msm8916-cci" + "qcom,msm8996-cci" + "qcom,sdm845-cci" + +- reg + Usage: required + Value type: + Definition: base address CCI I2C controller and length of memory + mapped region. + +- interrupts: + Usage: required + Value type: + Definition: specifies the CCI I2C interrupt. The format of the + specifier is defined by the binding document describing + the node's interrupt parent. + +- clocks: + Usage: required + Value type: + Definition: a list of phandle, should contain an entry for each + entries in clock-names. + +- clock-names + Usage: required + Value type: + Definition: a list of clock names, must include "cci" clock. + +- power-domains + Usage: required for "qcom,msm8996-cci" + Value type: + Definition: + +SUBNODES: + +The CCI provides I2C masters for one (msm8916) or two i2c busses (msm8996 and +sdm845), described as subdevices named "i2c-bus@0" and "i2c-bus@1". + +PROPERTIES: + +- reg: + Usage: required + Value type: + Definition: Index of the CCI bus/master + +- clock-frequency: + Usage: optional + Value type: + Definition: Desired I2C bus clock frequency in Hz, defaults to 100 + kHz if omitted. + +Example: + + cci@a0c000 { + compatible = "qcom,msm8996-cci"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0xa0c000 0x1000>; + interrupts = ; + clocks = <&mmcc MMSS_MMAGIC_AHB_CLK>, + <&mmcc CAMSS_TOP_AHB_CLK>, + <&mmcc CAMSS_CCI_AHB_CLK>, + <&mmcc CAMSS_CCI_CLK>, + <&mmcc CAMSS_AHB_CLK>; + clock-names = "mmss_mmagic_ahb", + "camss_top_ahb", + "cci_ahb", + "cci", + "camss_ahb"; + + i2c-bus@0 { + reg = <0>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + + i2c-bus@1 { + reg = <1>; + clock-frequency = <400000>; + #address-cells = <1>; + #size-cells = <0>; + }; + };