From patchwork Mon Feb 21 05:22:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rohit Agarwal X-Patchwork-Id: 544478 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C09ECC433FE for ; Mon, 21 Feb 2022 05:23:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1344404AbiBUFXe (ORCPT ); Mon, 21 Feb 2022 00:23:34 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:49056 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1344394AbiBUFXc (ORCPT ); Mon, 21 Feb 2022 00:23:32 -0500 Received: from alexa-out.qualcomm.com (alexa-out.qualcomm.com [129.46.98.28]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B1000EB7; Sun, 20 Feb 2022 21:23:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; i=@quicinc.com; q=dns/txt; s=qcdkim; t=1645420990; x=1676956990; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=fMeakxJfvIFXrpp7I77SKHM3vjQmBLuSF3EbkTZcV6w=; b=hiwREC+U4GJ7DYCrEhsmRp/7ssTY6t0XhTP1V9YAdEpn1G6BJ0McdjAl 8lanb43pDpd1qupQS80j88HSuMFibkMIUGapmCwDQQfDVuG3CspVTwPwy y+CVS4mcXgGHZ+5ZFGd4THd2uz8j3rO35APLx7fvHYWKMYzzqbVQFVWwW s=; Received: from ironmsg09-lv.qualcomm.com ([10.47.202.153]) by alexa-out.qualcomm.com with ESMTP; 20 Feb 2022 21:23:09 -0800 X-QCInternal: smtphost Received: from ironmsg02-blr.qualcomm.com ([10.86.208.131]) by ironmsg09-lv.qualcomm.com with ESMTP/TLS/AES256-SHA; 20 Feb 2022 21:23:06 -0800 X-QCInternal: smtphost Received: from hu-rohiagar-hyd.qualcomm.com (HELO hu-sgudaval-hyd.qualcomm.com) ([10.213.106.138]) by ironmsg02-blr.qualcomm.com with ESMTP; 21 Feb 2022 10:52:52 +0530 Received: by hu-sgudaval-hyd.qualcomm.com (Postfix, from userid 3970568) id 225E646C3; Mon, 21 Feb 2022 10:52:51 +0530 (+0530) From: Rohit Agarwal To: agross@kernel.org, bjorn.andersson@linaro.org, mturquette@baylibre.com, sboyd@kernel.org, robh+dt@kernel.org, jassisinghbrar@gmail.com, manivannan.sadhasivam@linaro.org Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rohit Agarwal Subject: [PATCH v3 1/7] dt-bindings: mailbox: Add binding for SDX65 APCS Date: Mon, 21 Feb 2022 10:52:27 +0530 Message-Id: <1645420953-21176-2-git-send-email-quic_rohiagar@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1645420953-21176-1-git-send-email-quic_rohiagar@quicinc.com> References: <1645420953-21176-1-git-send-email-quic_rohiagar@quicinc.com> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add devicetree YAML binding for SDX65 APCS GCC block. The APCS block acts as the mailbox controller and also provides a clock output and takes 3 clock sources (pll, aux, ref) as input. Signed-off-by: Rohit Agarwal --- Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml index 01e9d91..688ae8b 100644 --- a/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml +++ b/Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml @@ -91,6 +91,7 @@ allOf: compatible: enum: - qcom,sdx55-apcs-gcc + - qcom,sdx65-apcs-gcc then: properties: clocks: