diff mbox series

[v5,5/5] drm/msm/disp/dpu1: set mdp clk to the maximum frequency in opp table during probe

Message ID 1646758500-3776-6-git-send-email-quic_vpolimer@quicinc.com
State New
Headers show
Series Update mdp clk to max supported value to support higher refresh rates | expand

Commit Message

Vinod Polimera March 8, 2022, 4:55 p.m. UTC 
use max clock during probe/bind sequence from the opp table.
The clock will be scaled down when framework sends an update.

Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
index d550f90..d9922b9 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c
@@ -1221,6 +1221,7 @@  static int dpu_bind(struct device *dev, struct device *master, void *data)
 	struct dpu_kms *dpu_kms;
 	struct dss_module_power *mp;
 	int ret = 0;
+	unsigned long max_freq = ULONG_MAX;
 
 	dpu_kms = devm_kzalloc(&pdev->dev, sizeof(*dpu_kms), GFP_KERNEL);
 	if (!dpu_kms)
@@ -1243,6 +1244,8 @@  static int dpu_bind(struct device *dev, struct device *master, void *data)
 		return ret;
 	}
 
+	dev_pm_opp_find_freq_floor(dev, &max_freq);
+	dev_pm_opp_set_rate(dev, max_freq);
 	platform_set_drvdata(pdev, dpu_kms);
 
 	ret = msm_kms_init(&dpu_kms->base, &kms_funcs);