From patchwork Thu Sep 1 04:17:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Satya Priya Kakitapalli \(Temp\)" X-Patchwork-Id: 602493 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1A119ECAAD8 for ; Thu, 1 Sep 2022 04:18:16 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232624AbiIAESN (ORCPT ); Thu, 1 Sep 2022 00:18:13 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:52536 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232487AbiIAESF (ORCPT ); Thu, 1 Sep 2022 00:18:05 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0484610F943; Wed, 31 Aug 2022 21:18:02 -0700 (PDT) Received: from pps.filterd (m0279872.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 2812LQxh021417; Thu, 1 Sep 2022 04:17:59 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=qcppdkim1; bh=x0IRMGjcA2CLorutTCaSisYtCty1JCM5WAEfbx850mo=; b=Du7rzdgIxjpdOSjDyic/Z8OpYOh/y59F5KJKJiVjXo0qKVuTIX2p1bmd7/KPrGwv8BpM wUAGzCFlJj1Y47+5SZYM8GHcsiNxUSLlCbVkZ/qE740dJ+Tt2p8bigNsOodv+uw3Q/Fe YeohE6cqFXvSeD7J8STl1k3nU17hkW0umhCfTiklo1ESJh+D/TrxOiltWEpjp+IXQ/ju vFQw7pFzid1UapgNhbUarhSfewG99Fue5HmN2rnquJ9aLAwhAkOkJEY6vFDD3KdKifIi epEOREN1pZLJzEmE/4Vf/8DoLaXFPtsPhXxmPq17J9NiY+xetlTk0f8mOiI+Fd2q/dJb XA== Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3jahc4rhvq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 01 Sep 2022 04:17:59 +0000 Received: from nalasex01a.na.qualcomm.com (nalasex01a.na.qualcomm.com [10.47.209.196]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 2814HvJ3032044 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 1 Sep 2022 04:17:58 GMT Received: from c-skakit-linux.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Wed, 31 Aug 2022 21:17:54 -0700 From: Satya Priya To: Rob Herring , Bjorn Andersson CC: Douglas Anderson , Stephen Boyd , Andy Gross , , , , , , Subject: [PATCH V9 3/5] dt-bindings: clock: Add resets for LPASS audio clock controller for SC7280 Date: Thu, 1 Sep 2022 09:47:24 +0530 Message-ID: <1662005846-4838-4-git-send-email-quic_c_skakit@quicinc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1662005846-4838-1-git-send-email-quic_c_skakit@quicinc.com> References: <1662005846-4838-1-git-send-email-quic_c_skakit@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01a.na.qualcomm.com (10.47.209.196) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: WTZUYxV0_gQFMNFPZLmb8YsSXiJInmZn X-Proofpoint-ORIG-GUID: WTZUYxV0_gQFMNFPZLmb8YsSXiJInmZn X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.517,FMLib:17.11.122.1 definitions=2022-09-01_02,2022-08-31_03,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 bulkscore=0 spamscore=0 malwarescore=0 mlxscore=0 adultscore=0 phishscore=0 clxscore=1015 mlxlogscore=999 impostorscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2207270000 definitions=main-2209010019 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Taniya Das Add support for LPASS audio clock gating for RX/TX/SWA core bus clocks for SC7280. Update reg property min/max items in YAML schema. Fixes: 4185b27b3bef ("dt-bindings: clock: Add YAML schemas for LPASS clocks on SC7280") Acked-by: Rob Herring Signed-off-by: Taniya Das Reviewed-by: Stephen Boyd --- .../bindings/clock/qcom,sc7280-lpasscorecc.yaml | 19 ++++++++++++++++--- include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h | 5 +++++ 2 files changed, 21 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml index 5ccfb24..f50e284 100644 --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml @@ -22,6 +22,8 @@ properties: clock-names: true + reg: true + compatible: enum: - qcom,sc7280-lpassaoncc @@ -38,8 +40,8 @@ properties: '#power-domain-cells': const: 1 - reg: - maxItems: 1 + '#reset-cells': + const: 1 qcom,adsp-pil-mode: description: @@ -75,6 +77,11 @@ allOf: items: - const: bi_tcxo - const: lpass_aon_cc_main_rcg_clk_src + + reg: + items: + - description: lpass core cc register + - description: lpass audio csr register - if: properties: compatible: @@ -96,6 +103,8 @@ allOf: - const: bi_tcxo_ao - const: iface + reg: + maxItems: 1 - if: properties: compatible: @@ -114,6 +123,8 @@ allOf: items: - const: bi_tcxo + reg: + maxItems: 1 examples: - | #include @@ -122,13 +133,15 @@ examples: #include lpass_audiocc: clock-controller@3300000 { compatible = "qcom,sc7280-lpassaudiocc"; - reg = <0x3300000 0x30000>; + reg = <0x3300000 0x30000>, + <0x32a9000 0x1000>; clocks = <&rpmhcc RPMH_CXO_CLK>, <&lpass_aon LPASS_AON_CC_MAIN_RCG_CLK_SRC>; clock-names = "bi_tcxo", "lpass_aon_cc_main_rcg_clk_src"; power-domains = <&lpass_aon LPASS_AON_CC_LPASS_AUDIO_HM_GDSC>; #clock-cells = <1>; #power-domain-cells = <1>; + #reset-cells = <1>; }; - | diff --git a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h index 20ef2ea..22dcd47 100644 --- a/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h +++ b/include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h @@ -24,6 +24,11 @@ #define LPASS_AUDIO_CC_RX_MCLK_CLK 14 #define LPASS_AUDIO_CC_RX_MCLK_CLK_SRC 15 +/* LPASS AUDIO CC CSR */ +#define LPASS_AUDIO_SWR_RX_CGCR 0 +#define LPASS_AUDIO_SWR_TX_CGCR 1 +#define LPASS_AUDIO_SWR_WSA_CGCR 2 + /* LPASS_AON_CC clocks */ #define LPASS_AON_CC_PLL 0 #define LPASS_AON_CC_PLL_OUT_EVEN 1