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[209.132.180.67]) by mx.google.com with ESMTP id b6si10335893pll.661.2017.10.03.02.12.06; Tue, 03 Oct 2017 02:12:06 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=HsRwdhna; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751392AbdJCJMF (ORCPT + 11 others); Tue, 3 Oct 2017 05:12:05 -0400 Received: from mail-lf0-f51.google.com ([209.85.215.51]:55657 "EHLO mail-lf0-f51.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751194AbdJCJME (ORCPT ); Tue, 3 Oct 2017 05:12:04 -0400 Received: by mail-lf0-f51.google.com with SMTP id p184so8643856lfe.12 for ; Tue, 03 Oct 2017 02:12:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=Ym4ShgO+nrt0uaL+qCNuiBFalLp9kEZiOvNp0+6Dgzk=; b=HsRwdhna/TRoQ71JM9utrRN0SEu1wzzYkazpMIYF9kP99iEmT709DKfa57aSd2mMTK hEhE+gqBlsyuhGxazsNrHK1qvHfYvPiBZmnOorPygq04V8IJfuhG7ZGiX6ptTYVGgAaE +9QdjeJOic3eXnKki8HN9OvCYsFLoUErqaz5w= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Ym4ShgO+nrt0uaL+qCNuiBFalLp9kEZiOvNp0+6Dgzk=; b=F+41dRbQbbUhdzLh1+Efl91karvOEu1+0KHndruTm/u+DdUrXsTnQIXLMqrQ/vbppy 60P8zyiHeAPjV9wwGJcxDKgR7J1fq22DWt1fSNk4+Tya51AsFRIuRxHWlrhFdyJ64S3d KlcKpJBwQ6x+TtWpmzanuBY3ktHvJSnYGW/HpEu4R28eOzFAy7CTvTVwn1RjSLDFU75o Px1WEJf4XXMqMu/u+d3Uc0BgKorcWxOIgkj08YvXp9T6zGaIcELwcZoML0OR1yGv/WCS cd39sYyVBUci0Z26HhQVxbNXr45n1Rd46u13BJ4e0AixyUB7VxTykwegzoV2g5VQS6GY 8vsA== X-Gm-Message-State: AMCzsaUEHOUs8dDKhnpqAchtbqxDhVfB85hzVbCAfvw3455Mg7I+9edC w18OyeGW4mGci8cFBtn/NV571w== X-Google-Smtp-Source: AOwi7QAJe5pGAxhvPEAbGebXwNDfQeOTmClHLvMLukLM0C81W3tuiKXzhp3xgaZLNy8nyZe7pn9L3g== X-Received: by 10.25.56.1 with SMTP id f1mr3597885lfa.17.1507021923298; Tue, 03 Oct 2017 02:12:03 -0700 (PDT) Received: from genomnajs.ideon.se ([85.235.10.227]) by smtp.gmail.com with ESMTPSA id k184sm1942678lfg.53.2017.10.03.02.12.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 03 Oct 2017 02:12:02 -0700 (PDT) From: Linus Walleij To: linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, Andy Gross , David Brown Cc: Stephen Boyd , Bjorn Andersson , linux-soc@vger.kernel.org, Linus Walleij Subject: [PATCH 1/2] arm64: qcom: sbc: Name GPIO lines Date: Tue, 3 Oct 2017 11:11:54 +0200 Message-Id: <20171003091155.7138-1-linus.walleij@linaro.org> X-Mailer: git-send-email 2.13.5 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This names the GPIO lines on the APQ8016 "SBC" also known as the DragonBoard 410c, according to the schematic. This is necessary for a conforming userspace looking across all GPIO chips for the GPIO lines named "GPIO-A" thru "GPIO-L". Signed-off-by: Linus Walleij --- I don't have this hardware available, you can test it easily by compiling tools/gpio/* and issue "lsgpio" to see the GPIO line names in the console. Please apply this even if you're not applying the second patch renaming the DTS files. --- arch/arm64/boot/dts/qcom/apq8016-sbc.dts | 167 +++++++++++++++++++++++++++++++ 1 file changed, 167 insertions(+) -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts index 825f489a2af7..40b0d62861bb 100644 --- a/arch/arm64/boot/dts/qcom/apq8016-sbc.dts +++ b/arch/arm64/boot/dts/qcom/apq8016-sbc.dts @@ -19,3 +19,170 @@ model = "Qualcomm Technologies, Inc. APQ 8016 SBC"; compatible = "qcom,apq8016-sbc", "qcom,apq8016", "qcom,sbc"; }; + +/* + * Legend: proper name = the GPIO line is used as GPIO + * NC = not connected (pin out but not routed from the chip to + * anything the board) + * "[PER]" = pin is muxed for [peripheral] (not GPIO) + * "" = no idea, schematic doesn't say, could be + * unrouted (not connected to any external pin) + * LSEC = Low Speed External Connector + * HSEC = High Speed External Connector + * + * Line names are taken from the schematic "DragonBoard410c" + * dated monday, august 31, 2015. Page 5 in particular. + * + * For the lines routed to the external connectors the + * lines are named after the 96Boards CE Specification 1.0, + * Appendix "Expansion Connector Signal Description". + * + * When the 96Board naming of a line and the schematic name of + * the same line are in conflict, the 96Board specification + * takes precedence, which means that the external UART on the + * LSEC is named UART0 while the schematic and SoC names this + * UART3. This is only for the informational lines i.e. "[FOO]", + * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only + * ones actually used for GPIO. + */ +&msmgpio { + gpio-line-names = + "[UART0_TX]", /* GPIO 0, LSEC pin 1 */ + "[UART0_RX]", + "[UART0_CTS_N]", + "[UART0_RTS_N]", + "[UART1_TX]", + "[UART1_RX]", + "[I2C0_SDA]", + "[I2C0_SCL]", + "[SPI1_MOSI]", + "[SPI1_MISO]", + "[SPI1_CS_N]", /* GPIO 10 */ + "[SPI1_CLK]", + "GPIO-B", + "GPIO-C", + "[I2C3_SDA]", + "[I2C3_SCL]", + "[SPI0_MOSI]", + "[SPI0_MISO]", + "[SPI0_CS_N]", + "[SPI0_CLK]", + "HDMI_HPD_N", /* GPIO 20 */ + "USR_LED_1_CTRL", + "[I2C1_SDA]", + "[I2C1_SCL]", + "GPIO-G", + "GPIO-H", + "[CSI0_MCLK]", + "[CSI1_MCLK]", + "GPIO-K", + "[I2C2_SDA]", + "[I2C2_SCL]", /* GPIO 30 */ + "DSI2HDMI_INT_N", + "DSI_SW_SEL_APQ", + "GPIO-L", + "GPIO-J", + "GPIO-I", + "GPIO-A", /* GPIO_36 */ + "FORCED_USB_BOOT", + "SD_CARD_DET_N", + "[WCSS_BT_SSBI]", + "[WCSS_WLAN_DATA_2]", /* GPIO 40 */ + "[WCSS_WLAN_DATA_1]", + "[WCSS_WLAN_DATA_0]", + "[WCSS_WLAN_SET]", + "[WCSS_WLAN_CLK]", + "[WCSS_FM_SSBI]", + "[WCSS_FM_SDI]", + "[WCSS_BT_DAT_CTL]", + "[WCSS_BT_DAT_STB]", + "NC", + "NC", /* GPIO 50 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", /* GPIO 60 */ + "NC", + "NC", + "[CDC_PDM0_CLK]", + "[CDC_PDM0_SYNC]", + "[CDC_PDM0_TX0]", + "[CDC_PDM0_RX0]", + "[CDC_PDM0_RX1]", + "[CDC_PDM0_RX2]", + "GPIO-D", + "NC", /* GPIO 70 */ + "NC", + "NC", + "NC", + "NC", /* GPIO 74 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "BOOT_CONFIG_0", /* GPIO 80 */ + "BOOT_CONFIG_1", + "BOOT_CONFIG_2", + "BOOT_CONFIG_3", + "NC", + "NC", + "BOOT_CONFIG_5", + "NC", + "NC", + "NC", + "NC", /* GPIO 90 */ + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", + "NC", /* GPIO 100 */ + "NC", + "NC", + "NC", + "SSBI_GPS", + "NC", + "NC", + "KEY_VOLP_N", + "NC", + "NC", + "[LS_EXP_MI2S_WS]", /* GPIO 110 */ + "NC", + "NC", + "[LS_EXP_MI2S_SCK]", + "[LS_EXP_MI2S_DATA0]", + "GPIO-E", + "NC", + "[DSI2HDMI_MI2S_WS]", + "[DSI2HDMI_MI2S_SCK]", + "[DSI2HDMI_MI2S_DATA0]", + "USR_LED_2_CTRL", /* GPIO 120 */ + "USB_HS_ID"; +}; + +&pm8916_gpios { + gpio-line-names = + "USR_LED_3_CTRL", + "USR_LED_4_CTRL", + "USB_HUB_RESET_N_PM", + "USB_SW_SEL_PM"; +}; + +&pm8916_mpps { + gpio-line-names = + "VDD_PX_BIAS", + "WLAN_LED_CTRL", + "BT_LED_CTRL", + "GPIO-F"; +};