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[83.34.200.30]) by smtp.gmail.com with ESMTPSA id d18sm42594476wrb.90.2019.06.25.09.47.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 25 Jun 2019 09:47:59 -0700 (PDT) From: Jorge Ramirez-Ortiz To: jorge.ramirez-ortiz@linaro.org, sboyd@kernel.org, bjorn.andersson@linaro.org, david.brown@linaro.org, jassisinghbrar@gmail.com, mark.rutland@arm.com, mturquette@baylibre.com, robh+dt@kernel.org, will.deacon@arm.com, arnd@arndb.de, horms+renesas@verge.net.au, heiko@sntech.de, sibis@codeaurora.org, enric.balletbo@collabora.com, jagan@amarulasolutions.com, olof@lixom.net Cc: vkoul@kernel.org, niklas.cassel@linaro.org, georgi.djakov@linaro.org, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, khasim.mohammed@linaro.org Subject: [PATCH v3 13/14] arm64: dts: qcom: qcs404: Add DVFS support Date: Tue, 25 Jun 2019 18:47:32 +0200 Message-Id: <20190625164733.11091-14-jorge.ramirez-ortiz@linaro.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> References: <20190625164733.11091-1-jorge.ramirez-ortiz@linaro.org> MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Support dynamic voltage and frequency scaling on qcs404. Co-developed-by: Niklas Cassel Signed-off-by: Niklas Cassel Signed-off-by: Jorge Ramirez-Ortiz --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) -- 2.21.0 diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 9569686dbc41..4b4ce0b5df76 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -34,6 +34,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU1: cpu@101 { @@ -43,6 +46,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU2: cpu@102 { @@ -52,6 +58,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; CPU3: cpu@103 { @@ -61,6 +70,9 @@ enable-method = "psci"; cpu-idle-states = <&CPU_SLEEP_0>; next-level-cache = <&L2_0>; + clocks = <&apcs_glb>; + operating-points-v2 = <&cpu_opp_table>; + cpu-supply = <&pms405_s3>; }; L2_0: l2-cache {