[RFC,v2,1/4] firmware: qcom_scm: Add support for programming inline crypto keys

From: Eric Biggers <ebiggers@google.com>

Add support for the Inline Crypto Engine (ICE) key programming interface
that's needed for the ufs-qcom driver to use inline encryption on
Snapdragon SoCs.  This interface consists of two SCM calls: one to
program a key into a keyslot, and one to invalidate a keyslot.

Although the UFS specification defines a standard way to do this, on
these SoCs the Linux kernel isn't permitted to access the needed crypto
configuration registers directly; these SCM calls must be used instead.

Signed-off-by: Eric Biggers <ebiggers@google.com>
---
 drivers/firmware/qcom_scm.c | 96 +++++++++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm.h |  4 ++
 include/linux/qcom_scm.h    | 19 ++++++++
 3 files changed, 119 insertions(+)

Quoting Eric Biggers (2020-03-03 22:49:39)
> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> index 059bb0fbae9e..7fb9f606250f 100644
> --- a/drivers/firmware/qcom_scm.c
> +++ b/drivers/firmware/qcom_scm.c
> @@ -926,6 +927,101 @@ int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size)
[...]
> +
> +/**
> + * qcom_scm_ice_set_key() - Set an inline encryption key
> + * @index: the keyslot into which to set the key
> + * @key: the key to program
> + * @key_size: the size of the key in bytes
> + * @cipher: the encryption algorithm the key is for
> + * @data_unit_size: the encryption data unit size, i.e. the size of each
> + *                 individual plaintext and ciphertext.  Given in 512-byte
> + *                 units, e.g. 1 = 512 bytes, 8 = 4096 bytes, etc.
> + *
> + * Program a key into a keyslot of Qualcomm ICE (Inline Crypto Engine), where it
> + * can then be used to encrypt/decrypt UFS I/O requests inline.
> + *
> + * The UFSHCI standard defines a standard way to do this, but it doesn't work on
> + * these SoCs; only this SCM call does.
> + *
> + * Return: 0 on success; -errno on failure.
> + */
> +int qcom_scm_ice_set_key(u32 index, const u8 *key, int key_size,
> +                        enum qcom_scm_ice_cipher cipher, int data_unit_size)

Why not make key_size and data_unit_size unsigned?

> +{
> +       struct qcom_scm_desc desc = {
> +               .svc = QCOM_SCM_SVC_ES,
> +               .cmd = QCOM_SCM_ES_CONFIG_SET_ICE_KEY,
> +               .arginfo = QCOM_SCM_ARGS(5, QCOM_SCM_VAL, QCOM_SCM_RW,
> +                                        QCOM_SCM_VAL, QCOM_SCM_VAL,
> +                                        QCOM_SCM_VAL),
> +               .args[0] = index,
> +               .args[2] = key_size,
> +               .args[3] = cipher,
> +               .args[4] = data_unit_size,
> +               .owner = ARM_SMCCC_OWNER_SIP,
> +       };
> +       u8 *keybuf;
> +       dma_addr_t key_phys;
> +       int ret;
> +
> +       keybuf = kmemdup(key, key_size, GFP_KERNEL);

Is this to make the key physically contiguous? Probably worth a comment
to help others understand why this is here.

> +       if (!keybuf)
> +               return -ENOMEM;
> +
> +       key_phys = dma_map_single(__scm->dev, keybuf, key_size, DMA_TO_DEVICE);
> +       if (dma_mapping_error(__scm->dev, key_phys)) {
> +               ret = -ENOMEM;
> +               goto out;
> +       }
> +       desc.args[1] = key_phys;
> +
> +       ret = qcom_scm_call(__scm->dev, &desc, NULL);
> +
> +       dma_unmap_single(__scm->dev, key_phys, key_size, DMA_TO_DEVICE);
> +out:
> +       kzfree(keybuf);

And this is because we want to clear key contents out of the slab? What
about if the dma_map_single() bounces to a bounce buffer? I think that
isn't going to happen because __scm->dev is just some firmware device
that doesn't require bounce buffers but it's worth another comment to
clarify this.

> +       return ret;
> +}
> +EXPORT_SYMBOL(qcom_scm_ice_set_key);
> +
>  /**
>   * qcom_scm_hdcp_available() - Check if secure environment supports HDCP.
>   *

On Wed, Mar 04, 2020 at 09:04:49AM -0800, Stephen Boyd wrote:
> Quoting Eric Biggers (2020-03-03 22:49:39)
> > diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
> > index 059bb0fbae9e..7fb9f606250f 100644
> > --- a/drivers/firmware/qcom_scm.c
> > +++ b/drivers/firmware/qcom_scm.c
> > @@ -926,6 +927,101 @@ int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, u32 offset, u32 size)
> [...]
> > +
> > +/**
> > + * qcom_scm_ice_set_key() - Set an inline encryption key
> > + * @index: the keyslot into which to set the key
> > + * @key: the key to program
> > + * @key_size: the size of the key in bytes
> > + * @cipher: the encryption algorithm the key is for
> > + * @data_unit_size: the encryption data unit size, i.e. the size of each
> > + *                 individual plaintext and ciphertext.  Given in 512-byte
> > + *                 units, e.g. 1 = 512 bytes, 8 = 4096 bytes, etc.
> > + *
> > + * Program a key into a keyslot of Qualcomm ICE (Inline Crypto Engine), where it
> > + * can then be used to encrypt/decrypt UFS I/O requests inline.
> > + *
> > + * The UFSHCI standard defines a standard way to do this, but it doesn't work on
> > + * these SoCs; only this SCM call does.
> > + *
> > + * Return: 0 on success; -errno on failure.
> > + */
> > +int qcom_scm_ice_set_key(u32 index, const u8 *key, int key_size,
> > +                        enum qcom_scm_ice_cipher cipher, int data_unit_size)
> 
> Why not make key_size and data_unit_size unsigned?

No reason other than that 'int' is fewer characters and is a good default when
no other particular type is warranted.  But I can change them to 'unsigned int'
if people prefer to make it clearer that they can't be negative.

> 
> > +{
> > +       struct qcom_scm_desc desc = {
> > +               .svc = QCOM_SCM_SVC_ES,
> > +               .cmd = QCOM_SCM_ES_CONFIG_SET_ICE_KEY,
> > +               .arginfo = QCOM_SCM_ARGS(5, QCOM_SCM_VAL, QCOM_SCM_RW,
> > +                                        QCOM_SCM_VAL, QCOM_SCM_VAL,
> > +                                        QCOM_SCM_VAL),
> > +               .args[0] = index,
> > +               .args[2] = key_size,
> > +               .args[3] = cipher,
> > +               .args[4] = data_unit_size,
> > +               .owner = ARM_SMCCC_OWNER_SIP,
> > +       };
> > +       u8 *keybuf;
> > +       dma_addr_t key_phys;
> > +       int ret;
> > +
> > +       keybuf = kmemdup(key, key_size, GFP_KERNEL);
> 
> Is this to make the key physically contiguous? Probably worth a comment
> to help others understand why this is here.

Yes, dma_map_single() requires physically contiguous memory.  I'll add a
comment.

> 
> > +       if (!keybuf)
> > +               return -ENOMEM;
> > +
> > +       key_phys = dma_map_single(__scm->dev, keybuf, key_size, DMA_TO_DEVICE);
> > +       if (dma_mapping_error(__scm->dev, key_phys)) {
> > +               ret = -ENOMEM;
> > +               goto out;
> > +       }
> > +       desc.args[1] = key_phys;
> > +
> > +       ret = qcom_scm_call(__scm->dev, &desc, NULL);
> > +
> > +       dma_unmap_single(__scm->dev, key_phys, key_size, DMA_TO_DEVICE);
> > +out:
> > +       kzfree(keybuf);
> 
> And this is because we want to clear key contents out of the slab? What
> about if the dma_map_single() bounces to a bounce buffer? I think that
> isn't going to happen because __scm->dev is just some firmware device
> that doesn't require bounce buffers but it's worth another comment to
> clarify this.

Yes, in crypto-related code we always try to wipe keys after use.  I don't think
a bounce buffer would actually be used here, though it would be preferable to
wipe the DMA memory too so that we don't rely on that.  But I didn't see how to
do that; I'm not a DMA API expert.  Maybe dma_alloc_coherent()?  This isn't
really performance-critical.

- Eric