From patchwork Tue Sep 15 12:02:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 250254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-12.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_PATCH, MAILING_LIST_MULTI, SIGNED_OFF_BY, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF3FCC43461 for ; Tue, 15 Sep 2020 12:23:24 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 9EBFA218AC for ; Tue, 15 Sep 2020 12:23:24 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="TU3EY0AU" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726467AbgIOMXH (ORCPT ); Tue, 15 Sep 2020 08:23:07 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39518 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726477AbgIOMCJ (ORCPT ); Tue, 15 Sep 2020 08:02:09 -0400 Received: from mail-lj1-x244.google.com (mail-lj1-x244.google.com [IPv6:2a00:1450:4864:20::244]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3D8EEC061797 for ; Tue, 15 Sep 2020 05:02:08 -0700 (PDT) Received: by mail-lj1-x244.google.com with SMTP id u21so2566526ljl.6 for ; Tue, 15 Sep 2020 05:02:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=X1U8igR5qO7iPNb+4cf2CNWPJtBwSJ3VtmXN3I31cMM=; b=TU3EY0AUc9+U+0kAhm+eoAz7fwyGsJ6L/Qau3Y9me2xyi2UKuy92IiDI+rYV4YXEZY Sudi+xcVj19soxsjbrQop3vNZqvBorRP9iiVFsSnt7ca9YrkP7c3/RU9nG1B1+gzbAOk X2KahydmiPQn8k7n74Yhj4yg6xzYM6hB50t96Jb5lGkLU1QOb6jha1sth/F8RzEzti+0 Rmyse7kjufUhqz/K7nYIjztHqiEFOBmew59WkPOKObQ7qSL/WdIlHTGyZBa2OdASn6EE 42mVm8MGgTmCqI5zQuJklZciiX6hxh6Gho+enXhdDMAdGs4PNT+J9qHDsRZ1V9NUpTo1 GNEw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=X1U8igR5qO7iPNb+4cf2CNWPJtBwSJ3VtmXN3I31cMM=; b=D7aMwZu6Aha22ttH0Hv3/FjlxsGQO0f32yTtxUpIi5LwcNo6U14nRayFCJNPvselZn zkPgaiadEuZPVX2U+CZecnbVuIwpvitzLtfb3RclsE0zZqUGmBwly1BaMhKlriksHpH/ R0L5hw0BV9jn3ByinRfgu8iMK3g/d/OigmvMcwIsXtiomhedSsBlXtsS+o45f3cLiG70 0jARZMETjrY1YzqklmOl5KBfHMeQ4SjztZEIGcKWQkziYs8L2591MXqYqG5N4vtInQ4A rsksTmdfFCY54/lqQoPAxOElzqSFqmBL/4ooQow/t2JulGm/S5spT2Y0WXFFJJqR6TzH Lt2g== X-Gm-Message-State: AOAM530RFyE2f2mcIV362t1tT+91phFfsd0X4t7CEavtgBeaLfH3ccob mK4mhBJm4WuRFFODdZ3an1YgWrfjLuk68g== X-Google-Smtp-Source: ABdhPJznN0B+C5b0qITIqkvfKVWT6/WGjITA+UaIeZvn9OFsGeRSdOrbhb/Sjv8eL/KuadoP13D67w== X-Received: by 2002:a05:651c:10d:: with SMTP id a13mr6350084ljb.217.1600171326573; Tue, 15 Sep 2020 05:02:06 -0700 (PDT) Received: from eriador.lan ([188.162.64.139]) by smtp.gmail.com with ESMTPSA id u1sm4237613lfu.24.2020.09.15.05.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2020 05:02:05 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson Cc: Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH] arm64: dts: sm8250: Add OPP table for all qup devices Date: Tue, 15 Sep 2020 15:02:03 +0300 Message-Id: <20200915120203.290295-1-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.28.0 MIME-Version: 1.0 Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org qup has a requirement to vote on the performance state of the CX domain in sm8250 devices. Add OPP tables for these and also add power-domains property for all qup instances for uart and spi. i2c does not support scaling and uses a fixed clock. Signed-off-by: Dmitry Baryshkov Acked-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 69 ++++++++++++++++++++++++++++ 1 file changed, 69 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index c989bc1370ab..6cd45a667ba9 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -411,6 +411,25 @@ ipcc: mailbox@408000 { #mbox-cells = <2>; }; + qup_opp_table: qup-opp-table { + compatible = "operating-points-v2"; + + opp-50000000 { + opp-hz = /bits/ 64 <50000000>; + required-opps = <&rpmhpd_opp_min_svs>; + }; + + opp-75000000 { + opp-hz = /bits/ 64 <75000000>; + required-opps = <&rpmhpd_opp_low_svs>; + }; + + opp-120000000 { + opp-hz = /bits/ 64 <120000000>; + required-opps = <&rpmhpd_opp_svs>; + }; + }; + qupv3_id_2: geniqup@8c0000 { compatible = "qcom,geni-se-qup"; reg = <0x0 0x008c0000 0x0 0x6000>; @@ -445,6 +464,8 @@ spi14: spi@880000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -471,6 +492,8 @@ spi15: spi@884000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -497,6 +520,8 @@ spi16: spi@888000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -523,6 +548,8 @@ spi17: spi@88c000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -534,6 +561,8 @@ uart17: serial@88c000 { pinctrl-names = "default"; pinctrl-0 = <&qup_uart17_default>; interrupts = ; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -560,6 +589,8 @@ spi18: spi@890000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -571,6 +602,8 @@ uart18: serial@890000 { pinctrl-names = "default"; pinctrl-0 = <&qup_uart18_default>; interrupts = ; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -597,6 +630,8 @@ spi19: spi@894000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; }; @@ -635,6 +670,8 @@ spi0: spi@980000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -661,6 +698,8 @@ spi1: spi@984000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -687,6 +726,8 @@ spi2: spi@988000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -698,6 +739,8 @@ uart2: serial@988000 { pinctrl-names = "default"; pinctrl-0 = <&qup_uart2_default>; interrupts = ; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -724,6 +767,8 @@ spi3: spi@98c000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -750,6 +795,8 @@ spi4: spi@990000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -776,6 +823,8 @@ spi5: spi@994000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -802,6 +851,8 @@ spi6: spi@998000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -813,6 +864,8 @@ uart6: serial@998000 { pinctrl-names = "default"; pinctrl-0 = <&qup_uart6_default>; interrupts = ; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -839,6 +892,8 @@ spi7: spi@99c000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; }; @@ -877,6 +932,8 @@ spi8: spi@a80000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -903,6 +960,8 @@ spi9: spi@a84000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -929,6 +988,8 @@ spi10: spi@a88000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -955,6 +1016,8 @@ spi11: spi@a8c000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -981,6 +1044,8 @@ spi12: spi@a90000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -992,6 +1057,8 @@ uart12: serial@a90000 { pinctrl-names = "default"; pinctrl-0 = <&qup_uart12_default>; interrupts = ; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; @@ -1018,6 +1085,8 @@ spi13: spi@a94000 { interrupts = ; #address-cells = <1>; #size-cells = <0>; + power-domains = <&rpmhpd SM8250_CX>; + operating-points-v2 = <&qup_opp_table>; status = "disabled"; }; };