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[188.141.3.169]) by smtp.gmail.com with ESMTPSA id c11sm8312664wrs.28.2021.02.04.07.00.09 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 04 Feb 2021 07:00:09 -0800 (PST) From: Bryan O'Donoghue To: linux-clk@vger.kernel.org, linux-arm-msm@vger.kernel.org, mturquette@baylibre.com, sboyd@kernel.org, bjorn.andersson@linaro.org, robh+dt@kernel.org, agross@kernel.org Cc: bryan.odonoghue@linaro.org, jonathan@marek.ca, dikshita@codeaurora.org, dmitry.baryshkov@linaro.org, stanimir.varbanov@linaro.org Subject: [PATCH v2 3/4] clk: qcom: videocc: Add sm8250 VIDEO_CC_MVS0_CLK Date: Thu, 4 Feb 2021 15:01:19 +0000 Message-Id: <20210204150120.1521959-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> References: <20210204150120.1521959-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch adds the missing video_cc_mvs0_clk entry to videocc-sm8250 replicating in upstream the explicit entry for this clock in downstream. Signed-off-by: Bryan O'Donoghue Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov --- drivers/clk/qcom/videocc-sm8250.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) -- 2.29.2 diff --git a/drivers/clk/qcom/videocc-sm8250.c b/drivers/clk/qcom/videocc-sm8250.c index cc84963ced40..3ade240bd49c 100644 --- a/drivers/clk/qcom/videocc-sm8250.c +++ b/drivers/clk/qcom/videocc-sm8250.c @@ -217,6 +217,24 @@ static struct clk_branch video_cc_mvs0c_clk = { }, }; +static struct clk_branch video_cc_mvs0_clk = { + .halt_reg = 0xd34, + .halt_check = BRANCH_HALT_VOTED, + .clkr = { + .enable_reg = 0xd34, + .enable_mask = BIT(0), + .hw.init = &(struct clk_init_data){ + .name = "video_cc_mvs0_clk", + .parent_data = &(const struct clk_parent_data){ + .hw = &video_cc_mvs0_div_clk_src.clkr.hw, + }, + .num_parents = 1, + .flags = CLK_SET_RATE_PARENT, + .ops = &clk_branch2_ops, + }, + }, +}; + static struct clk_branch video_cc_mvs1_div2_clk = { .halt_reg = 0xdf4, .halt_check = BRANCH_HALT_VOTED, @@ -290,6 +308,7 @@ static struct gdsc mvs1_gdsc = { }; static struct clk_regmap *video_cc_sm8250_clocks[] = { + [VIDEO_CC_MVS0_CLK] = &video_cc_mvs0_clk.clkr, [VIDEO_CC_MVS0_CLK_SRC] = &video_cc_mvs0_clk_src.clkr, [VIDEO_CC_MVS0_DIV_CLK_SRC] = &video_cc_mvs0_div_clk_src.clkr, [VIDEO_CC_MVS0C_CLK] = &video_cc_mvs0c_clk.clkr,