From patchwork Wed Feb 2 11:37:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Srba X-Patchwork-Id: 539393 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DD0DAC433FE for ; Wed, 2 Feb 2022 11:40:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229916AbiBBLkZ (ORCPT ); Wed, 2 Feb 2022 06:40:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59618 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1343944AbiBBLkY (ORCPT ); Wed, 2 Feb 2022 06:40:24 -0500 Received: from mxd2.seznam.cz (mxd2.seznam.cz [IPv6:2a02:598:2::210]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6B88BC061714; Wed, 2 Feb 2022 03:40:22 -0800 (PST) Received: from email.seznam.cz by email-smtpc10a.ng.seznam.cz (email-smtpc10a.ng.seznam.cz [10.23.11.45]) id 080311cb530d45a209aadd95; Wed, 02 Feb 2022 12:39:55 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=seznam.cz; s=beta; t=1643801995; bh=lcWtxjBZ/ky2n+XCOFxmYKxg759yKJ9QaI12guWnqt4=; h=Received:From:To:Cc:Subject:Date:Message-Id:X-Mailer:MIME-Version: Content-Transfer-Encoding:X-szn-frgn:X-szn-frgc; b=Fpi60mEGS+ZHj15xFAlQeCxP4IL6iD4h+XpSOrQ3dRlwMb7xsSIqfSUa8dQnkM3jo p/+1gu5BICvr8h8/XCtxc8cEsvjwGk4BKU4AgFBme8XGjAYbZ/iALt3VhfZKgdeufL 6Y2YIBghOmbXJFmIZHjflWxKvMfPtnz/if605tk8= Received: from localhost.localdomain (ip-111-27.static.ccinternet.cz [147.161.27.111]) by email-relay25.ng.seznam.cz (Seznam SMTPD 1.3.136) with ESMTP; Wed, 02 Feb 2022 12:39:50 +0100 (CET) From: michael.srba@seznam.cz To: Andy Gross , Bjorn Andersson , Rob Herring , Stephen Boyd , Philipp Zabel Cc: Linus Walleij , Florian Fainelli , Arnd Bergmann , Greg Kroah-Hartman , Saravana Kannan , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Michael Srba Subject: [PATCH v5 1/5] dt-bindings: clock: gcc-msm8998: Add definitions of SSC-related clocks Date: Wed, 2 Feb 2022 12:37:18 +0100 Message-Id: <20220202113722.7550-1-michael.srba@seznam.cz> X-Mailer: git-send-email 2.34.1 MIME-Version: 1.0 X-szn-frgn: X-szn-frgc: <0> Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Michael Srba This patch adds definitions of four clocks which need to be manipulated in order to initialize the AHB bus which exposes the SCC block in the global address space. Signed-off-by: Michael Srba Acked-by: Rob Herring --- CHANGES: - v2: none - v3: none - v4: none - v5: none --- include/dt-bindings/clock/qcom,gcc-msm8998.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/include/dt-bindings/clock/qcom,gcc-msm8998.h b/include/dt-bindings/clock/qcom,gcc-msm8998.h index 72c99e486d86..1badb4f9c58f 100644 --- a/include/dt-bindings/clock/qcom,gcc-msm8998.h +++ b/include/dt-bindings/clock/qcom,gcc-msm8998.h @@ -186,6 +186,10 @@ #define UFS_UNIPRO_CORE_CLK_SRC 177 #define GCC_MMSS_GPLL0_CLK 178 #define HMSS_GPLL0_CLK_SRC 179 +#define GCC_IM_SLEEP 180 +#define AGGRE2_SNOC_NORTH_AXI 181 +#define SSC_XO 182 +#define SSC_CNOC_AHBS_CLK 183 #define PCIE_0_GDSC 0 #define UFS_GDSC 1