From patchwork Mon Feb 28 12:03:41 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 548289 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12216C433FE for ; Mon, 28 Feb 2022 12:03:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236130AbiB1ME0 (ORCPT ); Mon, 28 Feb 2022 07:04:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47400 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236136AbiB1MEY (ORCPT ); Mon, 28 Feb 2022 07:04:24 -0500 Received: from mail-lj1-x229.google.com (mail-lj1-x229.google.com [IPv6:2a00:1450:4864:20::229]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0CCC929C87 for ; Mon, 28 Feb 2022 04:03:44 -0800 (PST) Received: by mail-lj1-x229.google.com with SMTP id u7so17021829ljk.13 for ; Mon, 28 Feb 2022 04:03:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=X1kSt/cNOLlYSBXaFCcGxTofXAnfGn13whIIfArQmJc=; b=WrHVxS79m29CFEiohaDpnInO4nUT8U7LX83tqoBZx6omXMGH8ySx52udZKm3fpF8GH zPKoCeZxuyVit1itrSSvO5u04qqOk/0ki1kGK6MbQesZJ6qcrALguLJzZQs4Sll4e0Jc bp6H9dXH0JbEaPS/7CppuaFAILWZd4x91py53z56/KKwbDFLkuvbYF0Zm8Zky45dHJzB pdjndwx8oY4WawYUvAWqajDcLoeJZITuVIxpgj9u2TMaXYYsw8dg2K4C4j9LW70+h9dN INHSlcHchM3MDKZOhP6ON/WV+AYed0Mp9gxr2pj2yFeaRpYYgJDP3eX7rwJFeNXLITn5 jqzg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=X1kSt/cNOLlYSBXaFCcGxTofXAnfGn13whIIfArQmJc=; b=2zIVK/RWJKNPma3blVxUz3b/ub8yLIeCx3tBDh7JCfJsdQpmR8Z45j1Btd8LJKo8gB GWUtUlv/qhWpgA1RBMOjzq/v1t2gaq6zYJdpSWspoWe9LLNDsyvdB0mZtntdSBi0btpw 5HfTn9/i4vx3LSGnvItSOw+vlW0NdPDfTfAWvE5MSvCFnPL7Mh3Pr930b7M1EPfHw6xk qaE4ZMLYsBd+8LOCNeWXOow5yl4K+8xBM2Yy8CA46mv4oMPXSn20hPP2gY+j9hDFt+6q aWHv4NLKK2FFT8mgW2jBQiieQnWFlsi/lpLvQNuaTCdlsyXVxRbm1h0gj/6a0j92peGi YOMw== X-Gm-Message-State: AOAM532qPDjG8Rthi2vnOCM8fAd3FAi2ZjZptZq2MNmBEzkeoyZ4WHQw dEJHoTE7Dve2ybHlchv4hZ95Sg== X-Google-Smtp-Source: ABdhPJxj9aYhDgJS5z9oUFopmsw5kxl7jTsBdnOT3BNdANgWdC+WvaNNqb6+yrL67BD9qnP/D84gkA== X-Received: by 2002:a2e:3e13:0:b0:246:7097:87eb with SMTP id l19-20020a2e3e13000000b00246709787ebmr11534107lja.168.1646049822423; Mon, 28 Feb 2022 04:03:42 -0800 (PST) Received: from localhost.localdomain (88-113-46-102.elisa-laajakaista.fi. [88.113.46.102]) by smtp.gmail.com with ESMTPSA id q17-20020a2e8751000000b00244beaacef1sm1278111ljj.18.2022.02.28.04.03.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Feb 2022 04:03:42 -0800 (PST) From: Vladimir Zapolskiy To: Bjorn Andersson Cc: Andy Gross , Stephen Boyd , Michael Turquette , linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org Subject: [PATCH 6/8] clk: qcom: clk-alpha-pll: export lucid evo PLL configuration interfaces Date: Mon, 28 Feb 2022 14:03:41 +0200 Message-Id: <20220228120341.997121-1-vladimir.zapolskiy@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220228120258.997027-1-vladimir.zapolskiy@linaro.org> References: <20220228120258.997027-1-vladimir.zapolskiy@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The change exports lucid evo PLL configuration and control functions to clock controller drivers. Signed-off-by: Vladimir Zapolskiy --- drivers/clk/qcom/clk-alpha-pll.c | 65 ++++++++++++++++++++++++++++++++ drivers/clk/qcom/clk-alpha-pll.h | 5 ++- 2 files changed, 69 insertions(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c index 47879ee5a677..54bad5277802 100644 --- a/drivers/clk/qcom/clk-alpha-pll.c +++ b/drivers/clk/qcom/clk-alpha-pll.c @@ -191,8 +191,10 @@ EXPORT_SYMBOL_GPL(clk_alpha_pll_regs); #define LUCID_5LPE_ENABLE_VOTE_RUN BIT(21) /* LUCID EVO PLL specific settings and offsets */ +#define LUCID_EVO_PCAL_NOT_DONE BIT(8) #define LUCID_EVO_ENABLE_VOTE_RUN BIT(25) #define LUCID_EVO_PLL_L_VAL_MASK GENMASK(15, 0) +#define LUCID_EVO_PLL_CAL_L_VAL_SHIFT 16 /* ZONDA PLL specific */ #define ZONDA_PLL_OUT_MASK 0xf @@ -1994,6 +1996,33 @@ const struct clk_ops clk_alpha_pll_zonda_ops = { }; EXPORT_SYMBOL_GPL(clk_alpha_pll_zonda_ops); +void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config) +{ + clk_alpha_pll_write_config(regmap, PLL_L_VAL(pll), config->l | + (TRION_PLL_CAL_VAL << LUCID_EVO_PLL_CAL_L_VAL_SHIFT)); + + clk_alpha_pll_write_config(regmap, PLL_ALPHA_VAL(pll), config->alpha); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL(pll), config->config_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U(pll), config->config_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_CONFIG_CTL_U1(pll), config->config_ctl_hi1_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL(pll), config->user_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_USER_CTL_U(pll), config->user_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL(pll), config->test_ctl_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U(pll), config->test_ctl_hi_val); + clk_alpha_pll_write_config(regmap, PLL_TEST_CTL_U1(pll), config->test_ctl_hi1_val); + + /* Disable PLL output */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_OUTCTRL, 0); + + /* Set operation mode to STANDBY */ + regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY); + + /* Place the PLL in STANDBY mode */ + regmap_update_bits(regmap, PLL_MODE(pll), PLL_RESET_N, PLL_RESET_N); +} +EXPORT_SYMBOL_GPL(clk_lucid_evo_pll_configure); + static int alpha_pll_lucid_evo_enable(struct clk_hw *hw) { struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); @@ -2079,6 +2108,31 @@ static void alpha_pll_lucid_evo_disable(struct clk_hw *hw) regmap_write(regmap, PLL_OPMODE(pll), PLL_STANDBY); } +static int alpha_pll_lucid_evo_prepare(struct clk_hw *hw) +{ + struct clk_alpha_pll *pll = to_clk_alpha_pll(hw); + struct clk_hw *p; + u32 val = 0; + int ret; + + /* Return early if calibration is not needed. */ + regmap_read(pll->clkr.regmap, PLL_MODE(pll), &val); + if (!(val & LUCID_EVO_PCAL_NOT_DONE)) + return 0; + + p = clk_hw_get_parent(hw); + if (!p) + return -EINVAL; + + ret = alpha_pll_lucid_evo_enable(hw); + if (ret) + return ret; + + alpha_pll_lucid_evo_disable(hw); + + return 0; +} + static unsigned long alpha_pll_lucid_evo_recalc_rate(struct clk_hw *hw, unsigned long parent_rate) { @@ -2114,3 +2168,14 @@ const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops = { .set_rate = clk_lucid_evo_pll_postdiv_set_rate, }; EXPORT_SYMBOL_GPL(clk_alpha_pll_postdiv_lucid_evo_ops); + +const struct clk_ops clk_alpha_pll_lucid_evo_ops = { + .prepare = alpha_pll_lucid_evo_prepare, + .enable = alpha_pll_lucid_evo_enable, + .disable = alpha_pll_lucid_evo_disable, + .is_enabled = clk_trion_pll_is_enabled, + .recalc_rate = alpha_pll_lucid_evo_recalc_rate, + .round_rate = clk_alpha_pll_round_rate, + .set_rate = alpha_pll_lucid_5lpe_set_rate, +}; +EXPORT_SYMBOL_GPL(clk_alpha_pll_lucid_evo_ops); diff --git a/drivers/clk/qcom/clk-alpha-pll.h b/drivers/clk/qcom/clk-alpha-pll.h index 6e9907deaf30..0b7a6859ca2c 100644 --- a/drivers/clk/qcom/clk-alpha-pll.h +++ b/drivers/clk/qcom/clk-alpha-pll.h @@ -152,6 +152,8 @@ extern const struct clk_ops clk_alpha_pll_postdiv_lucid_5lpe_ops; extern const struct clk_ops clk_alpha_pll_zonda_ops; #define clk_alpha_pll_postdiv_zonda_ops clk_alpha_pll_postdiv_fabia_ops + +extern const struct clk_ops clk_alpha_pll_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_fixed_lucid_evo_ops; extern const struct clk_ops clk_alpha_pll_postdiv_lucid_evo_ops; @@ -168,6 +170,7 @@ void clk_agera_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, void clk_zonda_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, const struct alpha_pll_config *config); - +void clk_lucid_evo_pll_configure(struct clk_alpha_pll *pll, struct regmap *regmap, + const struct alpha_pll_config *config); #endif