From patchwork Thu Jun 2 20:24:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 579040 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DF451C433EF for ; Thu, 2 Jun 2022 20:27:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237644AbiFBU1G (ORCPT ); Thu, 2 Jun 2022 16:27:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55712 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239189AbiFBUY7 (ORCPT ); Thu, 2 Jun 2022 16:24:59 -0400 Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F2843A47A for ; Thu, 2 Jun 2022 13:24:57 -0700 (PDT) Received: by mail-lf1-x130.google.com with SMTP id l30so9559060lfj.3 for ; Thu, 02 Jun 2022 13:24:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=J4jsE+4ksbYLmNXEvnVNpF4H74ViV6SigqADiLcUbIU=; b=qDKKsbrD3u7dzPjfYSh7wD7ROlW5Jx9PBMe495HCoV4hFYc+apCzR3BVgGI7rpB8+r J923oZefTXXRO/1VDN4p94GTKiYNQ76cFmKb4WlDWAwJbEJeRe+OveDk84DIE8HCtYsU MQVbWwcXk1BnRKMxIDMkQd2NopKLYpr8bBIzPaiEhvbaSyDqXqzcVlXIovVMxNqzbDAq ierRR0r1sQ+C2K4swzQYz3DoquQ4y6JlllePDeomx7Sjj8jd1zu3ZJnlpGCUSJ9FB4LR 0AZwgy1f0lKv1M0xd2VIH+D4Qq5CnbXSwRy7JbGdrvT0DjKDkz0eLNYkb56GF93CQ+ya 2BTg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=J4jsE+4ksbYLmNXEvnVNpF4H74ViV6SigqADiLcUbIU=; b=pPGTdnDhMjmd/m21TEBbGsSoJC/O+GvgBzZ631mp3t/ZMZvyCCaEUL6q6SZM270bRf UUpmE26N3Lh//lmtQFANuvDCpbyPHCNCv84hCdATzNnfda9onAvRErKvSBGfuVaKmRU4 yHSe6U6PSsQk2RGciVkiuSliWHPwWzoAeB7Oxfyc8iF//euxKj2Cym8ASM3v5tg+zX2P bbtqeZYNiPUnZ+9ucAero3m68B+gk6q8RnX6ZuYQOccdy2KQJKkKvnjWG/ND+2vZo9VC kSYNcLidMMjoKD5IHyJuFZooiiIK67u8SEn4pBIBtbfCT9UVV7V6eXwVioHau1JprKam yMag== X-Gm-Message-State: AOAM530d1T1xeYTK+EXwKIDAnV8xXjanzS4aLysaTjejMBCNlA1URFQ9 bcYvT4JgLBdiS/Cj1/mmirYw5w== X-Google-Smtp-Source: ABdhPJwcvwwUmrdWkWRMRCgYSHn6Ui1pFRddbCHuD1G5NgrygNEpATEGWhABGjba6aBv/yLjtX+L4A== X-Received: by 2002:a05:6512:13a1:b0:448:887e:da38 with SMTP id p33-20020a05651213a100b00448887eda38mr4799622lfa.298.1654201496350; Thu, 02 Jun 2022 13:24:56 -0700 (PDT) Received: from eriador.lumag.spb.ru ([188.162.64.241]) by smtp.gmail.com with ESMTPSA id d25-20020a056512369900b0047255d21114sm1205718lfs.67.2022.06.02.13.24.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Jun 2022 13:24:55 -0700 (PDT) From: Dmitry Baryshkov To: Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , Bjorn Andersson , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, kernel test robot Subject: [PATCH v4 5/7] drm/msm/dpu: change catalog->dma_cfg to be a const pointer Date: Thu, 2 Jun 2022 23:24:45 +0300 Message-Id: <20220602202447.1755115-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220602202447.1755115-1-dmitry.baryshkov@linaro.org> References: <20220602202447.1755115-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Change dpu_mdss_cfg::dma_cfg to be a const pointer rather than embedding the dpu_reg_dma_cfg struct into the struct dpu_mdss_cfg. Reported-by: kernel test robot Reviewed-by: Abhinav Kumar Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 12 ++++++------ drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 2 +- 2 files changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c index 95b3ecc4db60..cca3b3a0c231 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c @@ -1780,7 +1780,7 @@ static void sdm845_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif = sdm845_vbif, .reg_dma_count = 1, - .dma_cfg = sdm845_regdma, + .dma_cfg = &sdm845_regdma, .perf = &sdm845_perf_data, .mdss_irqs = IRQ_SDM845_MASK, }; @@ -1811,7 +1811,7 @@ static void sc7180_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif = sdm845_vbif, .reg_dma_count = 1, - .dma_cfg = sdm845_regdma, + .dma_cfg = &sdm845_regdma, .perf = &sc7180_perf_data, .mdss_irqs = IRQ_SC7180_MASK, }; @@ -1844,7 +1844,7 @@ static void sm8150_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif = sdm845_vbif, .reg_dma_count = 1, - .dma_cfg = sm8150_regdma, + .dma_cfg = &sm8150_regdma, .perf = &sm8150_perf_data, .mdss_irqs = IRQ_SDM845_MASK, }; @@ -1875,7 +1875,7 @@ static void sc8180x_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif = sdm845_vbif, .reg_dma_count = 1, - .dma_cfg = sm8150_regdma, + .dma_cfg = &sm8150_regdma, .perf = &sc8180x_perf_data, .mdss_irqs = IRQ_SC8180X_MASK, }; @@ -1910,7 +1910,7 @@ static void sm8250_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .wb_count = ARRAY_SIZE(sm8250_wb), .wb = sm8250_wb, .reg_dma_count = 1, - .dma_cfg = sm8250_regdma, + .dma_cfg = &sm8250_regdma, .perf = &sm8250_perf_data, .mdss_irqs = IRQ_SM8250_MASK, }; @@ -1965,7 +1965,7 @@ static void qcm2290_cfg_init(struct dpu_mdss_cfg *dpu_cfg) .vbif_count = ARRAY_SIZE(sdm845_vbif), .vbif = sdm845_vbif, .reg_dma_count = 1, - .dma_cfg = sdm845_regdma, + .dma_cfg = &sdm845_regdma, .perf = &qcm2290_perf_data, .mdss_irqs = IRQ_SC7180_MASK, }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index 64ed96b2fa3d..60b403ac9f0f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h @@ -859,7 +859,7 @@ struct dpu_mdss_cfg { const struct dpu_wb_cfg *wb; u32 reg_dma_count; - struct dpu_reg_dma_cfg dma_cfg; + const struct dpu_reg_dma_cfg *dma_cfg; u32 ad_count;