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[188.155.176.92]) by smtp.gmail.com with ESMTPSA id i7-20020a170906444700b0070e238ff66fsm5876540ejp.96.2022.06.07.10.18.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 Jun 2022 10:18:59 -0700 (PDT) From: Krzysztof Kozlowski To: Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , Brian Masney , Konrad Dybcio , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Krzysztof Kozlowski Subject: [PATCH 08/14] arm64: dts: qcom: use generic sram as name for imem and ocmem nodes Date: Tue, 7 Jun 2022 19:18:42 +0200 Message-Id: <20220607171848.535128-8-krzysztof.kozlowski@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220607171848.535128-1-krzysztof.kozlowski@linaro.org> References: <20220607171848.535128-1-krzysztof.kozlowski@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org According to Devicetree specification, the device nodes should be generic, reflecting the function of the device. The typical name for memory regions is "sram". Signed-off-by: Krzysztof Kozlowski --- arch/arm64/boot/dts/qcom/msm8994.dtsi | 2 +- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7180.dtsi | 2 +- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm630.dtsi | 2 +- arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +- 6 files changed, 6 insertions(+), 6 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/msm8994.dtsi b/arch/arm64/boot/dts/qcom/msm8994.dtsi index 0318d42c5736..0327c9941ae5 100644 --- a/arch/arm64/boot/dts/qcom/msm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8994.dtsi @@ -1069,7 +1069,7 @@ mmcc: clock-controller@fd8c0000 { <600000000>; }; - ocmem: ocmem@fdd00000 { + ocmem: sram@fdd00000 { compatible = "qcom,msm8974-ocmem"; reg = <0xfdd00000 0x2000>, <0xfec00000 0x200000>; diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index d912166b7552..1cca749ac9fb 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -1102,7 +1102,7 @@ blsp2_spi0: spi@7af5000 { status = "disabled"; }; - imem@8600000 { + sram@8600000 { compatible = "simple-mfd"; reg = <0x08600000 0x1000>; diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index 5dcaac23a138..496fc2857d92 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -3247,7 +3247,7 @@ spmi_bus: spmi@c440000 { cell-index = <0>; }; - imem@146aa000 { + sram@146aa000 { compatible = "simple-mfd"; reg = <0 0x146aa000 0 0x2000>; diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index e66fc67de206..11fe2ed464d0 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -4639,7 +4639,7 @@ sdc2_data_sleep: sdc2-data-sleep { }; }; - imem@146a5000 { + sram@146a5000 { compatible = "qcom,sc7280-imem", "syscon"; reg = <0 0x146a5000 0 0x6000>; diff --git a/arch/arm64/boot/dts/qcom/sdm630.dtsi b/arch/arm64/boot/dts/qcom/sdm630.dtsi index b72e8e6c52f3..8d38c3d3c940 100644 --- a/arch/arm64/boot/dts/qcom/sdm630.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm630.dtsi @@ -1829,7 +1829,7 @@ blsp_i2c8: i2c@c1b8000 { status = "disabled"; }; - imem@146bf000 { + sram@146bf000 { compatible = "simple-mfd"; reg = <0x146bf000 0x1000>; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 0692ae0e60a4..6e13aab15931 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -4721,7 +4721,7 @@ spmi_bus: spmi@c440000 { cell-index = <0>; }; - imem@146bf000 { + sram@146bf000 { compatible = "simple-mfd"; reg = <0 0x146bf000 0 0x1000>;