| Message ID | 20220706145412.1566011-2-dmitry.baryshkov@linaro.org |
|---|---|
| State | Accepted |
| Commit | 63162b473e3ae016d1f4b468b26386bea1bd8d08 |
| Headers | show |
| Series | [1/6] arm64: dts: qcom: msm8996: add missing DSI clock assignments | expand |
On 06/07/2022 16:54, Dmitry Baryshkov wrote:
> To ease merging of bindings and dts files, the constants were replaced
In the future I recommend just adding defines in top part of DTSI (under
ifdef not defined). Then when time comes, you drop this entire piece of
defines which makes it extra readable and easy to review. Nice clean
patchset.
To review this approach, I would need to check every define if it
matches the previous number.
Best regards,
Krzysztof
On Wed 06 Jul 10:43 CDT 2022, Krzysztof Kozlowski wrote: > On 06/07/2022 16:54, Dmitry Baryshkov wrote: > > To ease merging of bindings and dts files, the constants were replaced > > In the future I recommend just adding defines in top part of DTSI (under > ifdef not defined). Then when time comes, you drop this entire piece of > defines which makes it extra readable and easy to review. Nice clean > patchset. > I worked out the underlying issue with the clock maintainer, so we should just use the dt-bindings defines directly from the beginning. Regards, Bjorn > To review this approach, I would need to check every define if it > matches the previous number. > > Best regards, > Krzysztof
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index 40e700cebe56..a3def1022ea2 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -2405,13 +2405,13 @@ gmu: gmu@3d6a000 { interrupts = <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "hfi", "gmu"; - clocks = <&gpucc 5>, - <&gpucc 8>, - <&gcc GCC_DDRSS_GPU_AXI_CLK>, - <&gcc GCC_GPU_MEMNOC_GFX_CLK>, - <&gpucc 2>, - <&gpucc 15>, - <&gpucc 11>; + clocks = <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_CXO_CLK>, + <&gcc GCC_DDRSS_GPU_AXI_CLK>, + <&gcc GCC_GPU_MEMNOC_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>, + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>; clock-names = "gmu", "cxo", "axi", @@ -2419,8 +2419,8 @@ gmu: gmu@3d6a000 { "ahb", "hub", "smmu_vote"; - power-domains = <&gpucc 0>, - <&gpucc 1>; + power-domains = <&gpucc GPU_CC_CX_GDSC>, + <&gpucc GPU_CC_GX_GDSC>; power-domain-names = "cx", "gx"; iommus = <&adreno_smmu 5 0x400>; @@ -2469,12 +2469,12 @@ adreno_smmu: iommu@3da0000 { <GIC_SPI 687 IRQ_TYPE_LEVEL_HIGH>; clocks = <&gcc GCC_GPU_MEMNOC_GFX_CLK>, - <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, - <&gpucc 2>, - <&gpucc 11>, - <&gpucc 5>, - <&gpucc 15>, - <&gpucc 13>; + <&gcc GCC_GPU_SNOC_DVM_GFX_CLK>, + <&gpucc GPU_CC_AHB_CLK>, + <&gpucc GPU_CC_HLOS1_VOTE_GPU_SMMU_CLK>, + <&gpucc GPU_CC_CX_GMU_CLK>, + <&gpucc GPU_CC_HUB_CX_INT_CLK>, + <&gpucc GPU_CC_HUB_AON_CLK>; clock-names = "gcc_gpu_memnoc_gfx_clk", "gcc_gpu_snoc_dvm_gfx_clk", "gpu_cc_ahb_clk", @@ -2483,7 +2483,7 @@ adreno_smmu: iommu@3da0000 { "gpu_cc_hub_cx_int_clk", "gpu_cc_hub_aon_clk"; - power-domains = <&gpucc 0>; + power-domains = <&gpucc GPU_CC_CX_GDSC>; }; remoteproc_mpss: remoteproc@4080000 {
To ease merging of bindings and dts files, the constants were replaced with numeric values. Change them back to defined constants. While we are at it, fix the indentation of these clocks properties to follow established guidelines. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 32 ++++++++++++++-------------- 1 file changed, 16 insertions(+), 16 deletions(-)