| Message ID | 20220712125922.3461675-4-bryan.odonoghue@linaro.org |
|---|---|
| State | Accepted |
| Commit | 680b86da10a23268b24d65b567830824075eb151 |
| Headers | show |
| Series | clk: qcom: gcc-msm8939: Align clock frequencies with downstream driver | expand |
diff --git a/drivers/clk/qcom/gcc-msm8939.c b/drivers/clk/qcom/gcc-msm8939.c index 6a3e2326c72a3..2aad40dbef8e6 100644 --- a/drivers/clk/qcom/gcc-msm8939.c +++ b/drivers/clk/qcom/gcc-msm8939.c @@ -1824,9 +1824,9 @@ static struct clk_branch gcc_ultaudio_pcnoc_sway_clk = { }; static const struct freq_tbl ftbl_gcc_venus0_vcodec0_clk[] = { - F(100000000, P_GPLL0, 8, 0, 0), - F(160000000, P_GPLL0, 5, 0, 0), - F(228570000, P_GPLL0, 3.5, 0, 0), + F(133330000, P_GPLL0, 6, 0, 0), + F(200000000, P_GPLL0, 4, 0, 0), + F(266670000, P_GPLL0, 3, 0, 0), { } };
The Venus clock frequencies are a copy/paste error from msm8916. Looking at the original clock-gcc-8936.c ftbl_gcc_venus0_vcodec0_clk defines we have: - 133 MHz - 200 MHz - 266 MHz These values are born out by the relevant qualcomm documentation for the msm8936/msm8939 Venus core performance levels. Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> --- drivers/clk/qcom/gcc-msm8939.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-)