From patchwork Mon Sep 26 22:09:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alex Elder X-Patchwork-Id: 609347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 249F1C6FA82 for ; Mon, 26 Sep 2022 22:09:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229605AbiIZWJt (ORCPT ); Mon, 26 Sep 2022 18:09:49 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:45926 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229803AbiIZWJr (ORCPT ); Mon, 26 Sep 2022 18:09:47 -0400 Received: from mail-io1-xd32.google.com (mail-io1-xd32.google.com [IPv6:2607:f8b0:4864:20::d32]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B4DD25FCB for ; Mon, 26 Sep 2022 15:09:44 -0700 (PDT) Received: by mail-io1-xd32.google.com with SMTP id e205so6426383iof.1 for ; Mon, 26 Sep 2022 15:09:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=eJFEaVPIZMCEIz3w2nXZe43VBHpxxUwng4PSWmEniu4=; b=WswXKx8RkxqtBbrlR6Q/iLKnZDjGRu4XbBg5F3DRSFA6S5WpuNv5WGS8L709mpqotu OZlvWdptZPyZ0/rFZpYBGhZ24X1fmLYW2uY2s4pZtaYtPSNOOHrTIfdJDymvzCkLZnVY QeOhI1O73P1tuxi/EGEPvTzFNUpLo2mWLhM9X3M/EJYIGpjEdn7BFuNoZMtaAY23B92w +Ak9/yFc3Bq8K3Wk8NulV5RLXYpsCz+pm2vbxN69xN4AcZBq0TpUhL76lM+ZE9VNIx/Y dDxv/p/yzcpmlku79rf1Q8DgP6kDvoARdsfKwtyw6JvuaMNe3Va/j1tReuykw1TwGGBY fGJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=eJFEaVPIZMCEIz3w2nXZe43VBHpxxUwng4PSWmEniu4=; b=jJuDQKjW5dSZ0edocNJaT81ykB6fwk32u9uAbd3LShwepzTSKgUJ+1L0D3kz5Gxoe7 oKUnWf5C0ZkzHxorKtLtsLbnHOjKA7BR3ZjFn6COMGmYyO8RnXRFy/vLkxF6xu9Hv+3P vYJ0UgYPx1tVyVNlzh0IVmyT7uFe+Xhdvd8N6qIjyF8ZT5avK6nWAJBHvL8eDVLR6tpL EXRjxMC4j7e+afMWVnNK4QGa7QyfizPX45zDeC8xwWViC5IPbABKw8ly59SMh41LgJCN seNwwF7QRxyVpKILNv7tS+iEcj7bG5kwG3F/fvMGSkJMvXyZyaFEpkdusAO18yOp9d1A vdQw== X-Gm-Message-State: ACrzQf0wcsrCdDtG3zOrcJDmGAFncRz6zDi05xj6CbxJIAzFyJAB6+cO SbcFyf6KlkwwkIpcjspog8SVXA== X-Google-Smtp-Source: AMsMyM6sDbO6AzaWgtpDH9BeumiwF71JyezyZl4nSAn6hWI3dPU4xRpZ5aj5KgJHM/ROD+O9fwQ1IQ== X-Received: by 2002:a05:6638:2648:b0:35a:74cf:7b0c with SMTP id n8-20020a056638264800b0035a74cf7b0cmr12649423jat.205.1664230184066; Mon, 26 Sep 2022 15:09:44 -0700 (PDT) Received: from localhost.localdomain ([98.61.227.136]) by smtp.gmail.com with ESMTPSA id z20-20020a027a54000000b003567503cf92sm7631600jad.82.2022.09.26.15.09.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 26 Sep 2022 15:09:42 -0700 (PDT) From: Alex Elder To: davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: mka@chromium.org, evgreen@chromium.org, andersson@kernel.org, quic_cpratapa@quicinc.com, quic_avuyyuru@quicinc.com, quic_jponduru@quicinc.com, quic_subashab@quicinc.com, elder@kernel.org, netdev@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH net-next 01/15] net: ipa: introduce IPA register IDs Date: Mon, 26 Sep 2022 17:09:17 -0500 Message-Id: <20220926220931.3261749-2-elder@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220926220931.3261749-1-elder@linaro.org> References: <20220926220931.3261749-1-elder@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Create a new ipa_reg_id enumerated type, which identifies each IPA register with a symbolic identifier. Use short names, but in some cases (such as "BCR") add "IPA_" to the name to help avoid name conflicts. Create two functions that indicate register validity. The first concisely indicates whether a register is valid for a given version of IPA, and if so, whether it is defined. The second indicates whether a register is valid for TX or RX endpoints. Signed-off-by: Alex Elder --- drivers/net/ipa/ipa_reg.c | 58 +++++++++++++++++++++++++++++++++++++++ drivers/net/ipa/ipa_reg.h | 55 +++++++++++++++++++++++++++++++++++++ 2 files changed, 113 insertions(+) diff --git a/drivers/net/ipa/ipa_reg.c b/drivers/net/ipa/ipa_reg.c index e6147a1cd787b..5d432f9c13f0a 100644 --- a/drivers/net/ipa/ipa_reg.c +++ b/drivers/net/ipa/ipa_reg.c @@ -9,11 +9,69 @@ #include "ipa.h" #include "ipa_reg.h" +/* Is this register valid for the current IPA version? */ +static bool ipa_reg_valid(struct ipa *ipa, enum ipa_reg_id reg_id) +{ + enum ipa_version version = ipa->version; + bool valid; + + /* Check for bogus (out of range) register IDs */ + if ((u32)reg_id >= IPA_REG_ID_COUNT) + return false; + + switch (reg_id) { + case IPA_BCR: + case COUNTER_CFG: + valid = version < IPA_VERSION_4_5; + break; + + case IPA_TX_CFG: + case FLAVOR_0: + case IDLE_INDICATION_CFG: + valid = version >= IPA_VERSION_3_5; + break; + + case QTIME_TIMESTAMP_CFG: + case TIMERS_XO_CLK_DIV_CFG: + case TIMERS_PULSE_GRAN_CFG: + valid = version >= IPA_VERSION_4_5; + break; + + case SRC_RSRC_GRP_45_RSRC_TYPE: + case DST_RSRC_GRP_45_RSRC_TYPE: + valid = version <= IPA_VERSION_3_1 || + version == IPA_VERSION_4_5; + break; + + case SRC_RSRC_GRP_67_RSRC_TYPE: + case DST_RSRC_GRP_67_RSRC_TYPE: + valid = version <= IPA_VERSION_3_1; + break; + + case ENDP_FILTER_ROUTER_HSH_CFG: + valid = version != IPA_VERSION_4_2; + break; + + case IRQ_SUSPEND_EN: + case IRQ_SUSPEND_CLR: + valid = version >= IPA_VERSION_3_1; + break; + + default: + valid = true; /* Others should be defined for all versions */ + break; + } + + return valid; +} + int ipa_reg_init(struct ipa *ipa) { struct device *dev = &ipa->pdev->dev; struct resource *res; + (void)ipa_reg_valid; /* Avoid a warning */ + /* Setup IPA register memory */ res = platform_get_resource_byname(ipa->pdev, IORESOURCE_MEM, "ipa-reg"); diff --git a/drivers/net/ipa/ipa_reg.h b/drivers/net/ipa/ipa_reg.h index f593cf3187950..e897550448c06 100644 --- a/drivers/net/ipa/ipa_reg.h +++ b/drivers/net/ipa/ipa_reg.h @@ -65,6 +65,61 @@ struct ipa; * of valid bits for the register. */ +/* enum ipa_reg_id - IPA register IDs */ +enum ipa_reg_id { + COMP_CFG, + CLKON_CFG, + ROUTE, + SHARED_MEM_SIZE, + QSB_MAX_WRITES, + QSB_MAX_READS, + FILT_ROUT_HASH_EN, + FILT_ROUT_HASH_FLUSH, + STATE_AGGR_ACTIVE, + IPA_BCR, /* Not IPA v4.5+ */ + LOCAL_PKT_PROC_CNTXT, + AGGR_FORCE_CLOSE, + COUNTER_CFG, /* Not IPA v4.5+ */ + IPA_TX_CFG, /* IPA v3.5+ */ + FLAVOR_0, /* IPA v3.5+ */ + IDLE_INDICATION_CFG, /* IPA v3.5+ */ + QTIME_TIMESTAMP_CFG, /* IPA v4.5+ */ + TIMERS_XO_CLK_DIV_CFG, /* IPA v4.5+ */ + TIMERS_PULSE_GRAN_CFG, /* IPA v4.5+ */ + SRC_RSRC_GRP_01_RSRC_TYPE, + SRC_RSRC_GRP_23_RSRC_TYPE, + SRC_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+, IPA v4.5 */ + SRC_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+ */ + DST_RSRC_GRP_01_RSRC_TYPE, + DST_RSRC_GRP_23_RSRC_TYPE, + DST_RSRC_GRP_45_RSRC_TYPE, /* Not IPA v3.5+, IPA v4.5 */ + DST_RSRC_GRP_67_RSRC_TYPE, /* Not IPA v3.5+ */ + ENDP_INIT_CTRL, /* Not IPA v4.2+ for TX, not IPA v4.0+ for RX */ + ENDP_INIT_CFG, + ENDP_INIT_NAT, /* TX only */ + ENDP_INIT_HDR, + ENDP_INIT_HDR_EXT, + ENDP_INIT_HDR_METADATA_MASK, /* RX only */ + ENDP_INIT_MODE, /* TX only */ + ENDP_INIT_AGGR, + ENDP_INIT_HOL_BLOCK_EN, /* RX only */ + ENDP_INIT_HOL_BLOCK_TIMER, /* RX only */ + ENDP_INIT_DEAGGR, /* TX only */ + ENDP_INIT_RSRC_GRP, + ENDP_INIT_SEQ, /* TX only */ + ENDP_STATUS, + ENDP_FILTER_ROUTER_HSH_CFG, /* Not IPA v4.2 */ + /* The IRQ registers are only used for GSI_EE_AP */ + IPA_IRQ_STTS, + IPA_IRQ_EN, + IPA_IRQ_CLR, + IPA_IRQ_UC, + IRQ_SUSPEND_INFO, + IRQ_SUSPEND_EN, /* IPA v3.1+ */ + IRQ_SUSPEND_CLR, /* IPA v3.1+ */ + IPA_REG_ID_COUNT, /* Last; not an ID */ +}; + #define IPA_REG_COMP_CFG_OFFSET 0x0000003c /* The next field is not supported for IPA v4.0+, not present for IPA v4.5+ */ #define ENABLE_FMASK GENMASK(0, 0)