From patchwork Fri Sep 30 19:10:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Konrad Dybcio X-Patchwork-Id: 611038 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A32E5C433F5 for ; Fri, 30 Sep 2022 19:11:04 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231332AbiI3TLD (ORCPT ); Fri, 30 Sep 2022 15:11:03 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231149AbiI3TLC (ORCPT ); Fri, 30 Sep 2022 15:11:02 -0400 Received: from relay02.th.seeweb.it (relay02.th.seeweb.it [IPv6:2001:4b7a:2000:18::163]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4A638143563 for ; Fri, 30 Sep 2022 12:11:00 -0700 (PDT) Received: from localhost.localdomain (95.49.31.201.neoplus.adsl.tpnet.pl [95.49.31.201]) by m-r1.th.seeweb.it (Postfix) with ESMTPA id 2E6B8200FF; Fri, 30 Sep 2022 21:10:57 +0200 (CEST) From: Konrad Dybcio To: ~postmarketos/upstreaming@lists.sr.ht Cc: martin.botka@somainline.org, angelogioacchino.delregno@somainline.org, marijn.suijten@somainline.org, jamipkettunen@somainline.org, Konrad Dybcio , Andy Gross , Bjorn Andersson , Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/8] arm64: dts: qcom: sdm845-tama: Add Synaptics Touchscreen Date: Fri, 30 Sep 2022 21:10:43 +0200 Message-Id: <20220930191049.123256-3-konrad.dybcio@somainline.org> X-Mailer: git-send-email 2.37.3 In-Reply-To: <20220930191049.123256-1-konrad.dybcio@somainline.org> References: <20220930191049.123256-1-konrad.dybcio@somainline.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add required pins and RMI4 node to the common DT and remove it from Akatsuki, as it uses a different touch. Since the panels are super high tech proprietary incell, they need to be handled with very precise timings. As such the panel driver sets up the power rails and GPIOs and the touchscreen driver *has to* probe afterwards. Signed-off-by: Konrad Dybcio --- .../qcom/sdm845-sony-xperia-tama-akatsuki.dts | 3 + .../dts/qcom/sdm845-sony-xperia-tama.dtsi | 69 ++++++++++++++++++- 2 files changed, 70 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama-akatsuki.dts b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama-akatsuki.dts index 2a16305ac5da..5c5949a51184 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama-akatsuki.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama-akatsuki.dts @@ -7,6 +7,9 @@ #include "sdm845-sony-xperia-tama.dtsi" +/* XZ3 uses an Atmel touchscreen instead. */ +/delete-node/ &touchscreen; + / { model = "Sony Xperia XZ3"; compatible = "sony,akatsuki-row", "qcom,sdm845"; diff --git a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi index ac8eb59ed010..809a6d7e739b 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845-sony-xperia-tama.dtsi @@ -375,10 +375,43 @@ &gcc { }; &i2c5 { - status = "okay"; clock-frequency = <400000>; + status = "okay"; + + touchscreen: touchscreen@2c { + compatible = "syna,rmi4-i2c"; + reg = <0x2c>; + + interrupt-parent = <&tlmm>; + interrupts = <125 IRQ_TYPE_EDGE_FALLING>; + vdd-supply = <&vreg_l14a_1p8>; + /* + * This is a blatant abuse of OF, but the panel driver *needs* + * to probe first, as the power/gpio switching needs to be precisely + * timed in order for both the display and touch panel to function properly. + */ + incell-supply = <&panel>; + + syna,reset-delay-ms = <220>; + syna,startup-delay-ms = <1000>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&ts_default>; + pinctrl-1 = <&ts_sleep>; - /* Synaptics touchscreen @ 2c, 3c */ + #address-cells = <1>; + #size-cells = <0>; + + rmi4-f01@1 { + reg = <0x01>; + syna,nosleep-mode = <1>; + }; + + rmi4-f12@12 { + reg = <0x12>; + syna,sensor-type = <1>; + }; + }; }; &i2c10 { @@ -497,6 +530,38 @@ sde_te_active_sleep: sde-te-active-sleep-state { drive-strength = <2>; bias-pull-down; }; + + ts_default: ts-default-state { + reset-pin { + pins = "gpio99"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + int-pin { + pins = "gpio125"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + }; + + ts_sleep: ts-sleep-state { + reset-pin { + pins = "gpio99"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + + int-pin { + pins = "gpio125"; + function = "gpio"; + drive-strength = <2>; + bias-pull-down; + }; + }; }; &uart6 {