From patchwork Wed Oct 12 08:49:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Johan Hovold X-Patchwork-Id: 614588 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BCB6AC32771 for ; Wed, 12 Oct 2022 08:50:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229495AbiJLIu4 (ORCPT ); Wed, 12 Oct 2022 04:50:56 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33656 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229774AbiJLIun (ORCPT ); Wed, 12 Oct 2022 04:50:43 -0400 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id F15DA760CF; Wed, 12 Oct 2022 01:50:41 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 3479DB819A3; Wed, 12 Oct 2022 08:50:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E3590C43145; Wed, 12 Oct 2022 08:50:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1665564638; bh=9nyAGS5QAzmJUhzuVdKVAvXKjrOv/M19QeLWUbmPdwI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=OtXw83vhPnrgJMAyL+SdHSyFTGvWKsmKw8gKPIfn7csDAafTGrNsj+o+u+iC74MXB Umk+vzAJmqCZ9jPX2ewD9YAaMJRVTSyxdmzwSbdu+aKJMcNUfpz1rKNuhWIhLLhICB lCFt2X5uMPUbv01OxK8jGuYX4/pgCNv+5+u2UnSNwVPLGDdZk5b+00/qVo14YcYl8Y p7olFpsqr2mL3UPa5MsvQv7zUstgaZSPk8uj1+w4pedu09gEexrePIknKOvg+nt8dS 5fecTzq/4TwLxlS2RsapkhK3oti7qCbzx+nM8AYqV1nP9p1xSiXQRbrTdHkn0aPijI AulpAd5g2jKGQ== Received: from johan by xi.lan with local (Exim 4.94.2) (envelope-from ) id 1oiXRe-0006Hj-Ih; Wed, 12 Oct 2022 10:50:30 +0200 From: Johan Hovold To: Vinod Koul Cc: Andy Gross , Bjorn Andersson , Konrad Dybcio , Kishon Vijay Abraham I , Dmitry Baryshkov , linux-arm-msm@vger.kernel.org, linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, Johan Hovold Subject: [PATCH 06/20] phy: qcom-qmp-pcie-msm8996: clean up ready and status polling Date: Wed, 12 Oct 2022 10:49:48 +0200 Message-Id: <20221012085002.24099-6-johan+linaro@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221012085002.24099-1-johan+linaro@kernel.org> References: <20221012084846.24003-1-johan+linaro@kernel.org> <20221012085002.24099-1-johan+linaro@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Clean up the PHY ready and status polling by dropping the configuration masks which are no longer needed since the QMP driver split. Signed-off-by: Johan Hovold Reviewed-by: Dmitry Baryshkov --- .../phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c | 19 ++++--------------- 1 file changed, 4 insertions(+), 15 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c index 899be7bd4d92..b9260c8746bf 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c @@ -35,7 +35,6 @@ #define PLL_READY_GATE_EN BIT(3) /* QPHY_PCS_STATUS bit */ #define PHYSTATUS BIT(6) -#define PHYSTATUS_4_20 BIT(7) /* QPHY_COM_PCS_READY_STATUS bit */ #define PCS_READY BIT(0) @@ -200,9 +199,6 @@ struct qmp_phy_cfg { unsigned int start_ctrl; unsigned int pwrdn_ctrl; - unsigned int mask_com_pcs_ready; - /* bit offset of PHYSTATUS in QPHY_PCS_STATUS register */ - unsigned int phy_status; }; /** @@ -318,8 +314,6 @@ static const struct qmp_phy_cfg msm8996_pciephy_cfg = { .start_ctrl = PCS_START | PLL_READY_GATE_EN, .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL, - .mask_com_pcs_ready = PCS_READY, - .phy_status = PHYSTATUS, }; static void qmp_pcie_msm8996_configure_lane(void __iomem *base, @@ -356,7 +350,7 @@ static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy) const struct qmp_phy_init_tbl *serdes_tbl = cfg->serdes_tbl; int serdes_tbl_num = cfg->serdes_tbl_num; void __iomem *status; - unsigned int mask, val; + unsigned int val; int ret; qmp_pcie_msm8996_configure(serdes, serdes_tbl, serdes_tbl_num); @@ -366,9 +360,7 @@ static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy) SERDES_START | PCS_START); status = serdes + cfg->regs[QPHY_COM_PCS_READY_STATUS]; - mask = cfg->mask_com_pcs_ready; - - ret = readl_poll_timeout(status, val, (val & mask), 10, + ret = readl_poll_timeout(status, val, (val & PCS_READY), 10, PHY_INIT_COMPLETE_TIMEOUT); if (ret) { dev_err(qmp->dev, @@ -484,7 +476,7 @@ static int qmp_pcie_msm8996_power_on(struct phy *phy) void __iomem *rx = qphy->rx; void __iomem *pcs = qphy->pcs; void __iomem *status; - unsigned int mask, val, ready; + unsigned int val; int ret; qmp_pcie_msm8996_serdes_init(qphy); @@ -522,10 +514,7 @@ static int qmp_pcie_msm8996_power_on(struct phy *phy) qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); status = pcs + cfg->regs[QPHY_PCS_STATUS]; - mask = cfg->phy_status; - ready = 0; - - ret = readl_poll_timeout(status, val, (val & mask) == ready, 10, + ret = readl_poll_timeout(status, val, !(val & PHYSTATUS), 10, PHY_INIT_COMPLETE_TIMEOUT); if (ret) { dev_err(qmp->dev, "phy initialization timed-out\n");