From patchwork Thu Oct 13 12:12:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Milen Mitkov \(Consultant\)" X-Patchwork-Id: 615284 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0114FC4332F for ; Thu, 13 Oct 2022 12:13:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229546AbiJMMNk (ORCPT ); Thu, 13 Oct 2022 08:13:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229496AbiJMMNj (ORCPT ); Thu, 13 Oct 2022 08:13:39 -0400 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6445DFAA42; Thu, 13 Oct 2022 05:13:34 -0700 (PDT) Received: from pps.filterd (m0279873.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.5/8.17.1.5) with ESMTP id 29DBpDAV005591; Thu, 13 Oct 2022 12:13:25 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=qcppdkim1; bh=GnXSW528tbh6uVAmVRQg7RTMQMPef1yz6kF9JkpXf9k=; b=Xf7cT/BG+UQJwnQIA4i058aO2dBPq1fnmZr2CBogG22NZn0W6Ca3JTyIdHbnma7Ps3qq L86QTIVZ0ZCk1qbt4XPAqSlf/ahEIRQykTkQlXq95pFqefgJuGrtYTHRrtxdfDHdsKJ2 iqFTDxaWHFY0dsCfCNd3A+ErU9yMxO0BA1MWAR+MNAKjKuWUfp6u8wdH1k69829yYSey OqvACtsZPzHYe5XQD2o7G/Q01bNpzsLeOGMaj7h1sKuPi24aaHA983x+yNxsL7ojh3N0 8Hpu1kD4HXk7/hfLWqm35+PpG6hOhq0Bg2XvSYcPGSK8UtGBzrEsvD5paBxaXj5v1lj6 BQ== Received: from nasanppmta05.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3k5xtf2n7n-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Oct 2022 12:13:25 +0000 Received: from nasanex01a.na.qualcomm.com ([10.52.223.231]) by NASANPPMTA05.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 29DCDOOP007430 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 13 Oct 2022 12:13:24 GMT Received: from mmitkov.eu.qualcomm.com (10.80.80.8) by nasanex01a.na.qualcomm.com (10.52.223.231) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Thu, 13 Oct 2022 05:13:20 -0700 From: To: , , , , , CC: , , , , , , , , Milen Mitkov Subject: [PATCH v4 3/4] media: camss: vfe-480: Multiple outputs support for SM8250 Date: Thu, 13 Oct 2022 15:12:54 +0300 Message-ID: <20221013121255.1977-4-quic_mmitkov@quicinc.com> X-Mailer: git-send-email 2.37.3.windows.1 In-Reply-To: <20221013121255.1977-1-quic_mmitkov@quicinc.com> References: <20221013121255.1977-1-quic_mmitkov@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01a.na.qualcomm.com (10.52.223.231) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: a8XHtEp8vd9mt_OJWt_jsSlzqk0_RcX4 X-Proofpoint-ORIG-GUID: a8XHtEp8vd9mt_OJWt_jsSlzqk0_RcX4 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-13_08,2022-10-13_01,2022-06-22_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 mlxscore=0 impostorscore=0 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 mlxlogscore=999 adultscore=0 malwarescore=0 clxscore=1015 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2209130000 definitions=main-2210130072 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Milen Mitkov On SM8250 each VFE supports at least 3 RDI channels, or 4 in case of VFE-Lite, so add appropriate IRQ setup and handling. Signed-off-by: Milen Mitkov Reviewed-by: Robert Foss --- .../media/platform/qcom/camss/camss-vfe-480.c | 61 ++++++++++++------- 1 file changed, 40 insertions(+), 21 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-vfe-480.c b/drivers/media/platform/qcom/camss/camss-vfe-480.c index 129585110393..88e4dc71ec6c 100644 --- a/drivers/media/platform/qcom/camss/camss-vfe-480.c +++ b/drivers/media/platform/qcom/camss/camss-vfe-480.c @@ -94,6 +94,8 @@ static inline int bus_irq_mask_0_comp_done(struct vfe_device *vfe, int n) #define RDI_WM(n) ((IS_LITE ? 0 : 23) + (n)) #define RDI_COMP_GROUP(n) ((IS_LITE ? 0 : 11) + (n)) +#define MAX_VFE_OUTPUT_LINES 4 + static u32 vfe_hw_version(struct vfe_device *vfe) { u32 hw_version = readl_relaxed(vfe->base + VFE_HW_VERSION); @@ -171,12 +173,26 @@ static inline void vfe_reg_update_clear(struct vfe_device *vfe, static void vfe_enable_irq_common(struct vfe_device *vfe) { - /* enable only the IRQs used: rup and comp_done irqs for RDI0 */ + /* enable reset ack IRQ and top BUS status IRQ */ writel_relaxed(IRQ_MASK_0_RESET_ACK | IRQ_MASK_0_BUS_TOP_IRQ, vfe->base + VFE_IRQ_MASK(0)); - writel_relaxed(BUS_IRQ_MASK_0_RDI_RUP(vfe, 0) | - BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0)), - vfe->base + VFE_BUS_IRQ_MASK(0)); +} + +static void vfe_enable_lines_irq(struct vfe_device *vfe) +{ + int i; + u32 bus_irq_mask = 0; + + for (i = 0; i < MAX_VFE_OUTPUT_LINES; i++) { + /* Enable IRQ for newly added lines, but also keep already running lines's IRQ */ + if (vfe->line[i].output.state == VFE_OUTPUT_RESERVED || + vfe->line[i].output.state == VFE_OUTPUT_ON) { + bus_irq_mask |= BUS_IRQ_MASK_0_RDI_RUP(vfe, i) + | BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i)); + } + } + + writel_relaxed(bus_irq_mask, vfe->base + VFE_BUS_IRQ_MASK(0)); } static void vfe_isr_reg_update(struct vfe_device *vfe, enum vfe_line_id line_id); @@ -193,6 +209,7 @@ static irqreturn_t vfe_isr(int irq, void *dev) { struct vfe_device *vfe = dev; u32 status; + int i; status = readl_relaxed(vfe->base + VFE_IRQ_STATUS(0)); writel_relaxed(status, vfe->base + VFE_IRQ_CLEAR(0)); @@ -207,11 +224,14 @@ static irqreturn_t vfe_isr(int irq, void *dev) writel_relaxed(status, vfe->base + VFE_BUS_IRQ_CLEAR(0)); writel_relaxed(1, vfe->base + VFE_BUS_IRQ_CLEAR_GLOBAL); - if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, 0)) - vfe_isr_reg_update(vfe, 0); + /* Loop through all WMs IRQs */ + for (i = 0; i < MSM_VFE_IMAGE_MASTERS_NUM; i++) { + if (status & BUS_IRQ_MASK_0_RDI_RUP(vfe, i)) + vfe_isr_reg_update(vfe, i); - if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(0))) - vfe_isr_wm_done(vfe, 0); + if (status & BUS_IRQ_MASK_0_COMP_DONE(vfe, RDI_COMP_GROUP(i))) + vfe_isr_wm_done(vfe, i); + } } return IRQ_HANDLED; @@ -234,24 +254,23 @@ static int vfe_get_output(struct vfe_line *line) struct vfe_device *vfe = to_vfe(line); struct vfe_output *output; unsigned long flags; - int wm_idx; spin_lock_irqsave(&vfe->output_lock, flags); output = &line->output; - if (output->state != VFE_OUTPUT_OFF) { + if (output->state > VFE_OUTPUT_RESERVED) { dev_err(vfe->camss->dev, "Output is running\n"); goto error; } output->wm_num = 1; - wm_idx = vfe_reserve_wm(vfe, line->id); - if (wm_idx < 0) { - dev_err(vfe->camss->dev, "Can not reserve wm\n"); - goto error_get_wm; - } - output->wm_idx[0] = wm_idx; + /* Correspondence between VFE line number and WM number. + * line 0 -> RDI 0, line 1 -> RDI1, line 2 -> RDI2, line 3 -> PIX/RDI3 + * Note this 1:1 mapping will not work for PIX streams. + */ + output->wm_idx[0] = line->id; + vfe->wm_output_map[line->id] = line->id; output->drop_update_idx = 0; @@ -259,11 +278,9 @@ static int vfe_get_output(struct vfe_line *line) return 0; -error_get_wm: - vfe_release_wm(vfe, output->wm_idx[0]); - output->state = VFE_OUTPUT_OFF; error: spin_unlock_irqrestore(&vfe->output_lock, flags); + output->state = VFE_OUTPUT_OFF; return -EINVAL; } @@ -279,7 +296,7 @@ static int vfe_enable_output(struct vfe_line *line) vfe_reg_update_clear(vfe, line->id); - if (output->state != VFE_OUTPUT_OFF) { + if (output->state > VFE_OUTPUT_RESERVED) { dev_err(vfe->camss->dev, "Output is not in reserved state %d\n", output->state); spin_unlock_irqrestore(&vfe->output_lock, flags); @@ -360,6 +377,8 @@ static int vfe_enable(struct vfe_line *line) vfe->stream_count++; + vfe_enable_lines_irq(vfe); + mutex_unlock(&vfe->stream_lock); ret = vfe_get_output(line); @@ -548,7 +567,7 @@ static const struct camss_video_ops vfe_video_ops_480 = { static void vfe_subdev_init(struct device *dev, struct vfe_device *vfe) { vfe->video_ops = vfe_video_ops_480; - vfe->line_num = 1; + vfe->line_num = MAX_VFE_OUTPUT_LINES; } const struct vfe_hw_ops vfe_ops_480 = {