From patchwork Wed Jan 18 16:22:40 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 643736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12F93C46467 for ; Wed, 18 Jan 2023 16:24:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230186AbjARQYj (ORCPT ); Wed, 18 Jan 2023 11:24:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:53388 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230123AbjARQYW (ORCPT ); Wed, 18 Jan 2023 11:24:22 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EC10858950 for ; Wed, 18 Jan 2023 08:22:45 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id iv8-20020a05600c548800b003db04a0a46bso1684571wmb.0 for ; Wed, 18 Jan 2023 08:22:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:from:to:cc:subject:date:message-id :reply-to; bh=vJhhwuYzq1Okb5/4x8Q7mNbhcHN2GG5v0qhyd4tEid4=; b=uwsUKsmC2V17s84crcW8TRooIA5Rn0Q1yi+v8X06HeswNhLV+psovM+vY86swB0Uja 9ZO2TwwtjqufNFDcMVjdgEJi7EnZ7AOcFyXHlph8/VV5ukGNydv2HgcJ+KqSjy+KKju6 Lot76QQigWhJLkhuMiXfAf5B/OA2VD8lc1rdymF/9/rLhhws44OPFhXcm53WcVthZSnU pX4+v80EZGi+3fYJkrMuZUNLcEqRvKLOHxe7AodCRSofeQq457Jj5/g/LSxRlWhgLrW/ JkWFA6Txm/zgl7bRB4ZJtuRUNyShMkXyvxy5RL1gqmxHA+UnmHImm5lrzPkyg3iaPZAa OcCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=cc:to:in-reply-to:references:message-id:content-transfer-encoding :mime-version:subject:date:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=vJhhwuYzq1Okb5/4x8Q7mNbhcHN2GG5v0qhyd4tEid4=; b=xS5KPCU8aamlTBTGy4cYwHk7W0zbN0U/OxBbwP2a+GYxHnVbLjE7dk+PKL7eQP8nMB wZQCoPZcBB8NeTwEo2KvPn/iAVssxuC/Hr6pxYoXhN+8o8y4MSeEYvTMp36gExdrl8bY iHQtHqpYMdjTUUIRb1/If1PAdAWZIHv3m22f2oTQoTn4Gq1lPSC9Pu3MkmbUTvH6W1sd KyNS6XFitLizM4VFarFGsdFKFqQ7Me4H5j7i+FisicJqfWiN1LBEkeduSjPvnVvtDjbx xn2PXVyJ6uY0mqiIeHgxkW0eJnSOrPPDug97aKBoWrPH0htsntz0xdsDPufgpf+KJ8G5 U4tg== X-Gm-Message-State: AFqh2kpXRKqUauQoI4FLQ8sXbDbDvP9RkHWDtUgSwwuMAr1IL6USv6c2 qGA4jVSEFmf15JInVb/0KWZ/zw== X-Google-Smtp-Source: AMrXdXsIc/v2+fEOdkqPKYNvyN8uXLNGCFxgDDsXSjYSe5vF1CdC2jX21aOkGe6a06P1C6/8JMNBmA== X-Received: by 2002:a05:600c:4191:b0:3d4:5741:af9b with SMTP id p17-20020a05600c419100b003d45741af9bmr15911084wmh.0.1674058964422; Wed, 18 Jan 2023 08:22:44 -0800 (PST) Received: from arrakeen.starnux.net ([2a01:e0a:982:cbb0:52eb:f6ff:feb3:451a]) by smtp.gmail.com with ESMTPSA id l23-20020a05600c1d1700b003db0dbbea53sm2744393wms.30.2023.01.18.08.22.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 18 Jan 2023 08:22:44 -0800 (PST) From: Neil Armstrong Date: Wed, 18 Jan 2023 17:22:40 +0100 Subject: [PATCH v4 2/5] dt-bindings: remoteproc: qcom: adsp: document sm8550 adsp, cdsp & mpss compatible MIME-Version: 1.0 Message-Id: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-2-54154c08c0b7@linaro.org> References: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> In-Reply-To: <20221114-narmstrong-sm8550-upstream-remoteproc-v4-0-54154c08c0b7@linaro.org> To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Mathieu Poirier , Rob Herring , Krzysztof Kozlowski , Manivannan Sadhasivam , Srinivas Kandagatla , Amol Maheshwari Cc: Alex Elder , linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Abel Vesa , Neil Armstrong , Krzysztof Kozlowski X-Mailer: b4 0.11.1 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This documents the compatible for the component used to boot the aDSP, cDSP and MPSS on the SM8550 SoC. The SM8550 boot process on SM8550 now requires a secondary "Devicetree" firmware to be passed along the main Firmware, and the cDSP a new power domain named "NSP". A third memory domain for the DSM memory zone is also needed for the MPSS PAS bindings. Reviewed-by: Krzysztof Kozlowski Signed-off-by: Neil Armstrong --- .../bindings/remoteproc/qcom,sm8550-pas.yaml | 178 +++++++++++++++++++++ 1 file changed, 178 insertions(+) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml new file mode 100644 index 000000000000..ae612809e260 --- /dev/null +++ b/Documentation/devicetree/bindings/remoteproc/qcom,sm8550-pas.yaml @@ -0,0 +1,178 @@ +# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/remoteproc/qcom,sm8550-pas.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Qualcomm SM8550 Peripheral Authentication Service + +maintainers: + - Manivannan Sadhasivam + +description: + Qualcomm SM8550 SoC Peripheral Authentication Service loads and boots firmware + on the Qualcomm DSP Hexagon cores. + +properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + - qcom,sm8550-mpss-pas + + reg: + maxItems: 1 + + clocks: + items: + - description: XO clock + + clock-names: + items: + - const: xo + + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + + smd-edge: false + + firmware-name: + $ref: /schemas/types.yaml#/definitions/string-array + items: + - description: Firmware name of the Hexagon core + - description: Firmware name of the Hexagon Devicetree + + memory-region: + minItems: 2 + items: + - description: Memory region for main Firmware authentication + - description: Memory region for Devicetree Firmware authentication + - description: DSM Memory region + +required: + - compatible + - reg + +allOf: + - $ref: /schemas/remoteproc/qcom,pas-common.yaml# + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + - qcom,sm8550-cdsp-pas + then: + properties: + interrupts: + maxItems: 5 + interrupt-names: + maxItems: 5 + memory-region: + maxItems: 2 + else: + properties: + interrupts: + minItems: 6 + interrupt-names: + minItems: 6 + memory-region: + minItems: 3 + + - if: + properties: + compatible: + enum: + - qcom,sm8550-adsp-pas + then: + properties: + power-domains: + items: + - description: LCX power domain + - description: LMX power domain + power-domain-names: + items: + - const: lcx + - const: lmx + + - if: + properties: + compatible: + enum: + - qcom,sm8550-cdsp-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + power-domain-names: + items: + - const: cx + - const: mxc + - if: + properties: + compatible: + enum: + - qcom,sm8550-mpss-pas + then: + properties: + power-domains: + items: + - description: CX power domain + - description: MXC power domain + - description: NSP power domain + power-domain-names: + items: + - const: cx + - const: mxc + - const: nsp + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + remoteproc@30000000 { + compatible = "qcom,sm8550-adsp-pas"; + reg = <0x030000000 0x100>; + + clocks = <&rpmhcc RPMH_CXO_CLK>; + clock-names = "xo"; + + interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, + <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; + interrupt-names = "wdog", "fatal", "ready", + "handover", "stop-ack"; + + memory-region = <&adsp_mem>, <&dtb_adsp_mem>; + + firmware-name = "qcom/sm8550/adsp.mbn", + "qcom/sm8550/adsp_dtb.mbn"; + + power-domains = <&rpmhpd_sm8550_lcx>, + <&rpmhpd_sm8550_lmx>; + power-domain-names = "lcx", "lmx"; + + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; + qcom,smem-state-names = "stop"; + + glink-edge { + interrupts-extended = <&ipcc IPCC_CLIENT_LPASS + IPCC_MPROC_SIGNAL_GLINK_QMP + IRQ_TYPE_EDGE_RISING>; + mboxes = <&ipcc IPCC_CLIENT_LPASS IPCC_MPROC_SIGNAL_GLINK_QMP>; + + label = "lpass"; + qcom,remote-pid = <2>; + + /* ... */ + }; + };