| Message ID | 20221116103146.2556846-9-abel.vesa@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add base device tree files for SM8550 | expand |
On 16/11/2022 11:31, Abel Vesa wrote: > From: Neil Armstrong <neil.armstrong@linaro.org> > > Add nodes for PMK8550 in separate dtsi file. > > Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org> > --- > arch/arm64/boot/dts/qcom/pmk8550.dtsi | 54 +++++++++++++++++++++++++++ > 1 file changed, 54 insertions(+) > create mode 100644 arch/arm64/boot/dts/qcom/pmk8550.dtsi > > diff --git a/arch/arm64/boot/dts/qcom/pmk8550.dtsi b/arch/arm64/boot/dts/qcom/pmk8550.dtsi > new file mode 100644 > index 000000000000..1f707202f5da > --- /dev/null > +++ b/arch/arm64/boot/dts/qcom/pmk8550.dtsi > @@ -0,0 +1,54 @@ > +// SPDX-License-Identifier: BSD-3-Clause > +/* > + * Copyright (c) 2022, Linaro Limited > + */ > + > +#include <dt-bindings/input/input.h> > +#include <dt-bindings/input/linux-event-codes.h> > +#include <dt-bindings/interrupt-controller/irq.h> > +#include <dt-bindings/spmi/spmi.h> > + > +&spmi_bus { > + pmk8550: pmic@0 { > + compatible = "qcom,pm8550", "qcom,spmi-pmic"; > + reg = <0x0 SPMI_USID>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + pmk8550_pon: pon@1300 { > + compatible = "qcom,pm8998-pon"; Don't you need to specify the PBS register too for this PMIC? Other than that: Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Konrad > + reg = <0x1300>; > + > + pon_pwrkey: pwrkey { > + compatible = "qcom,pmk8350-pwrkey"; > + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; > + linux,code = <KEY_POWER>; > + status = "disabled"; > + }; > + > + pon_resin: resin { > + compatible = "qcom,pmk8350-resin"; > + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; > + status = "disabled"; > + }; > + }; > + > + pmk8550_rtc: rtc@6100 { > + compatible = "qcom,pmk8350-rtc"; > + reg = <0x6100>, <0x6200>; > + reg-names = "rtc", "alarm"; > + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; > + status = "disabled"; > + }; > + > + pmk8550_gpios: gpio@8800 { > + compatible = "qcom,pmk8550-gpio", "qcom,spmi-gpio"; > + reg = <0xb800>; > + gpio-controller; > + gpio-ranges = <&pmk8550_gpios 0 0 6>; > + #gpio-cells = <2>; > + interrupt-controller; > + #interrupt-cells = <2>; > + }; > + }; > +};
diff --git a/arch/arm64/boot/dts/qcom/pmk8550.dtsi b/arch/arm64/boot/dts/qcom/pmk8550.dtsi new file mode 100644 index 000000000000..1f707202f5da --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmk8550.dtsi @@ -0,0 +1,54 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2022, Linaro Limited + */ + +#include <dt-bindings/input/input.h> +#include <dt-bindings/input/linux-event-codes.h> +#include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/spmi/spmi.h> + +&spmi_bus { + pmk8550: pmic@0 { + compatible = "qcom,pm8550", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pmk8550_pon: pon@1300 { + compatible = "qcom,pm8998-pon"; + reg = <0x1300>; + + pon_pwrkey: pwrkey { + compatible = "qcom,pmk8350-pwrkey"; + interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>; + linux,code = <KEY_POWER>; + status = "disabled"; + }; + + pon_resin: resin { + compatible = "qcom,pmk8350-resin"; + interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>; + status = "disabled"; + }; + }; + + pmk8550_rtc: rtc@6100 { + compatible = "qcom,pmk8350-rtc"; + reg = <0x6100>, <0x6200>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>; + status = "disabled"; + }; + + pmk8550_gpios: gpio@8800 { + compatible = "qcom,pmk8550-gpio", "qcom,spmi-gpio"; + reg = <0xb800>; + gpio-controller; + gpio-ranges = <&pmk8550_gpios 0 0 6>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; +};