From patchwork Sun Dec 4 12:45:00 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 630869 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3F881C63704 for ; Sun, 4 Dec 2022 12:45:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230001AbiLDMpQ (ORCPT ); Sun, 4 Dec 2022 07:45:16 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48534 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230000AbiLDMpQ (ORCPT ); Sun, 4 Dec 2022 07:45:16 -0500 Received: from mail-lj1-x236.google.com (mail-lj1-x236.google.com [IPv6:2a00:1450:4864:20::236]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4DD6A15A14 for ; Sun, 4 Dec 2022 04:45:14 -0800 (PST) Received: by mail-lj1-x236.google.com with SMTP id d3so10587554ljl.1 for ; Sun, 04 Dec 2022 04:45:14 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=VCuoHjhGwQBOUM1I+GqcrpL4FHYOQF6MYULvhP6nSAQ=; b=DngB8CONoakTcYkKKDNrRts6xc8cT3tVuqq+Hs9u5akI6zbwdU895e/6dVUzlQ6459 PT9rgL7/NQ8ebR0MBzOg41RV5HmIIzUkJQs2Gnje0D/ArQcHM0mA/YLMVwt1CIp0jPgn lTa2sSHa8ix0LT4JS4EKhq0DjOSVFHA1hE7dqKzkOMOnDvo+0kk010qq7A+JX2dFYqsM eB+WpZfFxhExOjqBQrkhm02LAG+4l7BKmswHJFR6+8ULOvI7ehPBgRVjrFg4zwcnnT03 i1EwPqc999N/y0pnmgHSGMu+envl6rwVZuvPP2zmlIS2GQ7e15bgeqGYN/jDOJzOkGQE 2PLw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=VCuoHjhGwQBOUM1I+GqcrpL4FHYOQF6MYULvhP6nSAQ=; b=0b+LhlMPSVY1BXwzsAMDnKfwNQLmOVPNdfjLaRCzul0xoTLSPN4gZ5PRJZO14evUtK kqjgbe2JPzTPg5H+GMQ8u7LS+/kmlGzbZzUcgsxZ29UoJ4t63YXdt2NJjcQ34NHN8oUa aP33aRE76na833KISpODj43EfcUu8f0sWXVvuRoz4/3j/2ivA36vyzAFhT3eBdmxviri +GafUJfz9oKow6PFh8CE/ZojNaREp3F/xCvauTlF8/sgIatJCuU85Yj601Twn+uJMTHU hUwJg1vZLxPfr2dZk8/WCQD9cbP6QcPEjRTuiwDG1eEJ+vQUA4R7XTT8IXLjc2WZRFst GN5Q== X-Gm-Message-State: ANoB5pmzSJ9pPi7IiGW6Aq5GTFQYiNwtyhSOSrfJwG83gvIm1QEw6Azv /zoO8aayfAIrv1ZQEmVuIXq/gQ== X-Google-Smtp-Source: AA0mqf6QJhS71Zi5lo1Xnq2Uhjv50DbemJ/93rlrsuY4xnUK45xEyBboD5tTzqyxyXCjJMUEDMfypA== X-Received: by 2002:a2e:b4a5:0:b0:279:8315:a253 with SMTP id q5-20020a2eb4a5000000b002798315a253mr15965406ljm.230.1670157912550; Sun, 04 Dec 2022 04:45:12 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id k18-20020a05651239d200b0049771081b10sm1763006lfu.31.2022.12.04.04.45.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 04 Dec 2022 04:45:12 -0800 (PST) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Stephen Boyd , Michael Turquette , Rob Herring , Krzysztof Kozlowski , Taniya Das Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, Neil Armstrong , Konrad Dybcio Subject: [PATCH v4 03/11] clk: qcom: gcc-msm8974: use ARRAY_SIZE instead of specifying num_parents Date: Sun, 4 Dec 2022 14:45:00 +0200 Message-Id: <20221204124508.1415713-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20221204124508.1415713-1-dmitry.baryshkov@linaro.org> References: <20221204124508.1415713-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Use ARRAY_SIZE() instead of manually specifying num_parents. This makes adding/removing entries to/from parent_data easy and errorproof. Reviewed-by: Neil Armstrong Reviewed-by: Konrad Dybcio Signed-off-by: Dmitry Baryshkov --- drivers/clk/qcom/gcc-msm8974.c | 110 ++++++++++++++++----------------- 1 file changed, 55 insertions(+), 55 deletions(-) diff --git a/drivers/clk/qcom/gcc-msm8974.c b/drivers/clk/qcom/gcc-msm8974.c index bf305fa9e522..b847ce852ef8 100644 --- a/drivers/clk/qcom/gcc-msm8974.c +++ b/drivers/clk/qcom/gcc-msm8974.c @@ -88,7 +88,7 @@ static struct clk_rcg2 config_noc_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "config_noc_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -100,7 +100,7 @@ static struct clk_rcg2 periph_noc_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "periph_noc_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -112,7 +112,7 @@ static struct clk_rcg2 system_noc_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "system_noc_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -185,7 +185,7 @@ static struct clk_rcg2 usb30_master_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "usb30_master_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -205,7 +205,7 @@ static struct clk_rcg2 blsp1_qup1_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup1_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -230,7 +230,7 @@ static struct clk_rcg2 blsp1_qup1_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup1_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -243,7 +243,7 @@ static struct clk_rcg2 blsp1_qup2_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup2_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -257,7 +257,7 @@ static struct clk_rcg2 blsp1_qup2_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup2_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -270,7 +270,7 @@ static struct clk_rcg2 blsp1_qup3_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup3_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -284,7 +284,7 @@ static struct clk_rcg2 blsp1_qup3_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup3_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -297,7 +297,7 @@ static struct clk_rcg2 blsp1_qup4_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup4_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -311,7 +311,7 @@ static struct clk_rcg2 blsp1_qup4_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup4_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -324,7 +324,7 @@ static struct clk_rcg2 blsp1_qup5_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup5_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -338,7 +338,7 @@ static struct clk_rcg2 blsp1_qup5_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup5_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -351,7 +351,7 @@ static struct clk_rcg2 blsp1_qup6_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup6_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -365,7 +365,7 @@ static struct clk_rcg2 blsp1_qup6_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_qup6_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -398,7 +398,7 @@ static struct clk_rcg2 blsp1_uart1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart1_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -412,7 +412,7 @@ static struct clk_rcg2 blsp1_uart2_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart2_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -426,7 +426,7 @@ static struct clk_rcg2 blsp1_uart3_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart3_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -440,7 +440,7 @@ static struct clk_rcg2 blsp1_uart4_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart4_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -454,7 +454,7 @@ static struct clk_rcg2 blsp1_uart5_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart5_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -468,7 +468,7 @@ static struct clk_rcg2 blsp1_uart6_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp1_uart6_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -481,7 +481,7 @@ static struct clk_rcg2 blsp2_qup1_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup1_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -495,7 +495,7 @@ static struct clk_rcg2 blsp2_qup1_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup1_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -508,7 +508,7 @@ static struct clk_rcg2 blsp2_qup2_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup2_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -522,7 +522,7 @@ static struct clk_rcg2 blsp2_qup2_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup2_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -535,7 +535,7 @@ static struct clk_rcg2 blsp2_qup3_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup3_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -549,7 +549,7 @@ static struct clk_rcg2 blsp2_qup3_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup3_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -562,7 +562,7 @@ static struct clk_rcg2 blsp2_qup4_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup4_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -576,7 +576,7 @@ static struct clk_rcg2 blsp2_qup4_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup4_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -589,7 +589,7 @@ static struct clk_rcg2 blsp2_qup5_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup5_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -603,7 +603,7 @@ static struct clk_rcg2 blsp2_qup5_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup5_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -616,7 +616,7 @@ static struct clk_rcg2 blsp2_qup6_i2c_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup6_i2c_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -630,7 +630,7 @@ static struct clk_rcg2 blsp2_qup6_spi_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_qup6_spi_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -644,7 +644,7 @@ static struct clk_rcg2 blsp2_uart1_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart1_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -658,7 +658,7 @@ static struct clk_rcg2 blsp2_uart2_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart2_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -672,7 +672,7 @@ static struct clk_rcg2 blsp2_uart3_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart3_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -686,7 +686,7 @@ static struct clk_rcg2 blsp2_uart4_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart4_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -700,7 +700,7 @@ static struct clk_rcg2 blsp2_uart5_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart5_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -714,7 +714,7 @@ static struct clk_rcg2 blsp2_uart6_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "blsp2_uart6_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -741,7 +741,7 @@ static struct clk_rcg2 ce1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "ce1_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -762,7 +762,7 @@ static struct clk_rcg2 ce2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "ce2_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -794,7 +794,7 @@ static struct clk_rcg2 gp1_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gp1_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -808,7 +808,7 @@ static struct clk_rcg2 gp2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gp2_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -822,7 +822,7 @@ static struct clk_rcg2 gp3_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gp3_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -840,7 +840,7 @@ static struct clk_rcg2 pdm2_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "pdm2_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -872,7 +872,7 @@ static const struct freq_tbl ftbl_gcc_sdcc1_apps_clk_pro[] = { static struct clk_init_data sdcc1_apps_clk_src_init = { .name = "sdcc1_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_floor_ops, }; @@ -894,7 +894,7 @@ static struct clk_rcg2 sdcc2_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc2_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_floor_ops, }, }; @@ -908,7 +908,7 @@ static struct clk_rcg2 sdcc3_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc3_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_floor_ops, }, }; @@ -922,7 +922,7 @@ static struct clk_rcg2 sdcc4_apps_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "sdcc4_apps_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_floor_ops, }, }; @@ -941,7 +941,7 @@ static struct clk_rcg2 tsif_ref_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "tsif_ref_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -959,7 +959,7 @@ static struct clk_rcg2 usb30_mock_utmi_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "usb30_mock_utmi_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -978,7 +978,7 @@ static struct clk_rcg2 usb_hs_system_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "usb_hs_system_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -1022,7 +1022,7 @@ static struct clk_rcg2 usb_hsic_io_cal_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "usb_hsic_io_cal_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 1, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, }; @@ -1041,7 +1041,7 @@ static struct clk_rcg2 usb_hsic_system_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "usb_hsic_system_clk_src", .parent_names = gcc_xo_gpll0, - .num_parents = 2, + .num_parents = ARRAY_SIZE(gcc_xo_gpll0), .ops = &clk_rcg2_ops, }, };