From patchwork Thu Feb 2 12:38:52 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 649742 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE3AFC64ED8 for ; Thu, 2 Feb 2023 12:39:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230456AbjBBMjT (ORCPT ); Thu, 2 Feb 2023 07:39:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230454AbjBBMjQ (ORCPT ); Thu, 2 Feb 2023 07:39:16 -0500 Received: from mail-wr1-x433.google.com (mail-wr1-x433.google.com [IPv6:2a00:1450:4864:20::433]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 991D28624F for ; Thu, 2 Feb 2023 04:39:15 -0800 (PST) Received: by mail-wr1-x433.google.com with SMTP id bk16so1554434wrb.11 for ; Thu, 02 Feb 2023 04:39:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=XKRUB3ekcFn44JBsuKcc+Tgmo4eTYUFf+kIzIFVRtKs=; b=TARE+r4iLlFwkrXNeLEKVc94OAzu3INuD+B/XXVVM9liRBwU4IJ3aSFug4x9pKreIp srY8U9ibmJ1TPXpiua5v+kv/jcywcPSB8b34D6SNwUpLe924dydG0ggpLlHnAP4VHZrF n2jICPAEQez9ZVcIjMOIdWstArSGjIaf5owP0zXstj8kcGdSxpGfKU+m0aZJRSD+Y1+m Vu9voOOG7WY2/m5RBGjqVdtOVjpqhoBwbCR7tPR8vUybIVxsyrdEaPU8llEgeroxeOl1 t3o+KQDBx3aDhCB1MNhzWMOILRJ6LwIkhdCDb+YmYBOjdQwd4EPyevZ/56kvVlULYeaY spiQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=XKRUB3ekcFn44JBsuKcc+Tgmo4eTYUFf+kIzIFVRtKs=; b=DxjYatlBabQNg0J33Ty/qFFmPXRkhrEZ1VQ+nJWWJ0BeljTIp6p5fpsWzkWs+kbE1v 40cZRzyuhfWUciO4U87uaT/1G5Dxr1aGUj8Rc22ksUK1qWhfbx4EDAjusGk14NTLNwzC bgwdDFTbHnnWqfXFzD7+vVP8y/nE8pBnycESOB4AGdi6Z5RYdOc9SG7A5lvF3HBNmjfK nNjqvFEkHC4oAe/toNiTh9bK+JiRC/G1yFkBLOrmuE4RNfpU00AO5Ct5F3etxx9AWNot zFo+RoBx6zzktJulpxyj6z4LhyDjGS7g/T39u3D6FbFpvXbQbpqXKS8piudAu8Rb+Gaa 2RPg== X-Gm-Message-State: AO0yUKXJCgE8FPEM8wP/iNgeZfS6iDGBwP/PsQoXtFweNYrha4AVD6b0 groik6JKr3yj906+FlxDWB5FeQ== X-Google-Smtp-Source: AK7set9mnIBbitTZjM2AnfrOdg982R9dvwA9i4G2GywEWZ+CpAu3VeexaaaUT8kSP2AyuZgByPxNkg== X-Received: by 2002:adf:c753:0:b0:2bf:ae51:807c with SMTP id b19-20020adfc753000000b002bfae51807cmr5380145wrh.22.1675341554027; Thu, 02 Feb 2023 04:39:14 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id j5-20020adff005000000b002bddd75a83fsm19525644wro.8.2023.02.02.04.39.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 02 Feb 2023 04:39:13 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , Dmitry Baryshkov Subject: [PATCH v6 02/12] phy: qcom-qmp: pcs: Add v6 register offsets Date: Thu, 2 Feb 2023 14:38:52 +0200 Message-Id: <20230202123902.3831491-3-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230202123902.3831491-1-abel.vesa@linaro.org> References: <20230202123902.3831491-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS offsets in a dedicated header file. Signed-off-by: Abel Vesa Reviewed-by: Dmitry Baryshkov --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v5 of this patch is: https://lore.kernel.org/all/20230124124714.3087948-3-abel.vesa@linaro.org/ Changes since v5: * none Changes since v4: * none Changes since v3: * added Dmitry's R-b tag Changes since v2: * none Changes since v1: * split all the offsets into separate patches, like Vinod suggested drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h | 16 ++++++++++++++++ drivers/phy/qualcomm/phy-qcom-qmp.h | 2 ++ 2 files changed, 18 insertions(+) create mode 100644 drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h new file mode 100644 index 000000000000..18c4a3abe590 --- /dev/null +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright (c) 2023, Linaro Limited + */ + +#ifndef QCOM_PHY_QMP_PCS_V6_H_ +#define QCOM_PHY_QMP_PCS_V6_H_ + +/* Only for QMP V6 PHY - USB/PCIe PCS registers */ +#define QPHY_V6_PCS_REFGEN_REQ_CONFIG1 0xdc +#define QPHY_V6_PCS_RX_SIGDET_LVL 0x188 +#define QPHY_V6_PCS_RATE_SLEW_CNTRL1 0x198 +#define QPHY_V6_PCS_EQ_CONFIG2 0x1e0 +#define QPHY_V6_PCS_PCS_TX_RX_CONFIG 0x1d0 + +#endif diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.h b/drivers/phy/qualcomm/phy-qcom-qmp.h index a63a691b8372..80e3b5c860b6 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.h +++ b/drivers/phy/qualcomm/phy-qcom-qmp.h @@ -38,6 +38,8 @@ #include "phy-qcom-qmp-pcs-v5_20.h" +#include "phy-qcom-qmp-pcs-v6.h" + /* Only for QMP V3 & V4 PHY - DP COM registers */ #define QPHY_V3_DP_COM_PHY_MODE_CTRL 0x00 #define QPHY_V3_DP_COM_SW_RESET 0x04