From patchwork Fri Feb 3 08:17:56 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Abel Vesa X-Patchwork-Id: 650240 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id AB1C9C636CC for ; Fri, 3 Feb 2023 08:18:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232450AbjBCISX (ORCPT ); Fri, 3 Feb 2023 03:18:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56320 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232297AbjBCISR (ORCPT ); Fri, 3 Feb 2023 03:18:17 -0500 Received: from mail-wm1-x32d.google.com (mail-wm1-x32d.google.com [IPv6:2a00:1450:4864:20::32d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A5C1A1F91B for ; Fri, 3 Feb 2023 00:18:15 -0800 (PST) Received: by mail-wm1-x32d.google.com with SMTP id n13so3233619wmr.4 for ; Fri, 03 Feb 2023 00:18:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=hHVSZmfPgAo5RFgaLsgTBVwp8EpbSHQ6eJ1ToXPAf7w=; b=O027C0LG52ThmPeI7y3otX8Qaax8KR7ZNtcaHwJLBjOpGRtMDJ3y96MTi8ywPblY8a WUmqEIapAADmtxMbIuNsR8u13YhadKLLQ+1Wjc3l7DBxQmjkMpVEmfSWyDY84wlnDDqe WZlKp5+qFZLtz1M6IzW16Kz+I3pvPyTMkoTGE494W7EyiajIddDho3YtEF3lKxZERecd 66utQVbBtIoJCwc03yzJz2JVII4wRNeILC/aBYwBKVsSna+cg5Rbrj4Y3hO8YYQTsFoT BUsP/8jXWj3U+YOjKWGrcn85wfEAlMIU6enF7CfcvGbE7oHqdCqZtclrXVpk2g7GyzBB jq7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=hHVSZmfPgAo5RFgaLsgTBVwp8EpbSHQ6eJ1ToXPAf7w=; b=SvAU5qfNjRZRuhEv0+QUXe1HSgG2FwJAfixsbL3l8bEP/DaTUUYLU+3nbXLF0T4AkO 0XHDcSRgLQg8LQHDyoa6jc9yEoZD5DtHnQ4w4ovdOuFm6fiipNI1Cos94XZ6XMPd3HiS O8R2bhlg2A/wuKitX40sLX177NAiGV0ZpkpCQQRJesB3RbNgOcrOXiRQMAwIBzuGJOYg +P7OH395TmUopSDjFoG1x+JgC4XggGNIorkbKA1NBdCk9z1+SqgZi/OkNc9zOr8RQ2bX QVJpP/gtS7KbmDt+hwFP3iDwbvtAUUmjZvbPoHKTGobSF0mOYKsFgr5etDqvWp0PGtJI ggGg== X-Gm-Message-State: AO0yUKWgKMobU3A2ksazSBvv0z/afbrXuurDgNlVLjfTka5qpk4Jk/ul j0jKexH7Q30vTcqhL1sOdV5yxg== X-Google-Smtp-Source: AK7set81X5uOetuvZvX0o27PRIRbeEQ/NJkqiTaEuo0msEwT8ahEuMWN3/5iVWpFQUIpq+XZF5ovrQ== X-Received: by 2002:a1c:7718:0:b0:3dc:5805:9d75 with SMTP id t24-20020a1c7718000000b003dc58059d75mr9009111wmi.18.1675412294069; Fri, 03 Feb 2023 00:18:14 -0800 (PST) Received: from hackbox.lan ([94.52.112.99]) by smtp.gmail.com with ESMTPSA id az24-20020a05600c601800b003dc4baaedd3sm7316591wmb.37.2023.02.03.00.18.12 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 03 Feb 2023 00:18:13 -0800 (PST) From: Abel Vesa To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Bjorn Helgaas , Krzysztof Kozlowski , Lorenzo Pieralisi , "vkoul@kernel.org" , Kishon Vijay Abraham I , Manivannan Sadhasivam , Johan Hovold Cc: linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, devicetree@vger.kernel.org, Linux Kernel Mailing List , Krzysztof Kozlowski Subject: [PATCH v7 01/12] dt-bindings: phy: Add QMP PCIe PHY comptible for SM8550 Date: Fri, 3 Feb 2023 10:17:56 +0200 Message-Id: <20230203081807.2248625-2-abel.vesa@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230203081807.2248625-1-abel.vesa@linaro.org> References: <20230203081807.2248625-1-abel.vesa@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Document the QMP PCIe PHY compatible for SM8550. Signed-off-by: Abel Vesa Reviewed-by: Krzysztof Kozlowski --- This patchset relies on the following patchset: https://lore.kernel.org/all/20230117224148.1914627-1-abel.vesa@linaro.org/ The v6 of this patch is: https://lore.kernel.org/all/20230202123902.3831491-2-abel.vesa@linaro.org/ Changes since v6: * none Changes since v5: * added Krzysztof's R-b tag * renmaed the no-CSR reset to "phy_nocsr" as discussed off-list with Bjorn and Johan Changes since v4: * constrained resets and reset-names to 1 for every other SoC Changes since v3: * increased the allowed number of resets to allow ncsr reset * added vdda-qref-supply which is used by pcie1_phy node in MTP dts * added both compatibles to the allOf:if:then clause to constrain the number of possible clocks to 5 Changes since v2: * added back the binding compatible update patch Changes since v1: * split all the offsets into separate patches, like Vinod suggested .../phy/qcom,sc8280xp-qmp-pcie-phy.yaml | 30 ++++++++++++++++++- 1 file changed, 29 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml index 8a85318d9c92..ef49efbd0a20 100644 --- a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml @@ -20,6 +20,8 @@ properties: - qcom,sc8280xp-qmp-gen3x2-pcie-phy - qcom,sc8280xp-qmp-gen3x4-pcie-phy - qcom,sm8350-qmp-gen3x1-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy reg: minItems: 1 @@ -43,16 +45,21 @@ properties: maxItems: 1 resets: - maxItems: 1 + minItems: 1 + maxItems: 2 reset-names: + minItems: 1 items: - const: phy + - const: phy_nocsr vdda-phy-supply: true vdda-pll-supply: true + vdda-qref-supply: true + qcom,4ln-config-sel: description: PCIe 4-lane configuration $ref: /schemas/types.yaml#/definitions/phandle-array @@ -113,6 +120,8 @@ allOf: contains: enum: - qcom,sm8350-qmp-gen3x1-pcie-phy + - qcom,sm8550-qmp-gen3x2-pcie-phy + - qcom,sm8550-qmp-gen4x2-pcie-phy then: properties: clocks: @@ -126,6 +135,25 @@ allOf: clock-names: minItems: 6 + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8550-qmp-gen4x2-pcie-phy + then: + properties: + resets: + minItems: 2 + reset-names: + minItems: 2 + else: + properties: + resets: + maxItems: 1 + reset-names: + maxItems: 1 + examples: - | #include